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A WorkinProcess Estimation Method Based on Bottleneck
Machines’ Process Time Variability |
| JIANG Shu-yu,ZHOU Bing-hai |
| (School of Mechanical Engineering, Shanghai Jiaotong University, Shanghai 200240, China) |
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Abstract The minimization of cycle time (CT) and the maximization of throughput rate (TH) are the primary goals of semiconductor wafer manufacturing systems. A heuristic algorithm based on the CONWIP release control policy and G/G/m queueing network model was developed. The algorithm aims at calculating a suitable workinprocess (WIP) level in a semiconductor wafer manufacturing system, and considers the factors that cause the bottleneck machines to depart from regular, predictable process time (bottleneck machines’ process time variability). The results of simulation experiments indicate that, fixing the WIP level calculated by the proposed algorithm in the system can achieve a good combination of CT and TH within a certain scope of bottleneck machines’ process time variability.
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Received: 15 December 2007
Published: 28 December 2008
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