INTRODUCTION
The emergence of silicon-based integrated circuit (IC) technology has provided a solid guarantee for the fourth Industrial Revolution, greatly increasing the speed and capacity of chips to process information. In the era of big data, more integrated devices are needed to increase the speed of processing massive data. However, the ever-increasing transistor density on silicon-based ICs will become costly1-3. Moreover, when the channel length is reduced to a few nanometers, the short-channel effect will play a dominant role in the transistor and seriously affect the device performance4. Considering that conventional silicon semiconductors are approaching their physical limits, there is a strong desire to explore alternative channel materials in order to extend Moore's law5,6. 2D van der Waals materials, owing to their unique and novel physical properties even with monolayer, have been regarded as promising candidate materials to support IC technologies in post-Moore era7-10. For example, many reports have shown that monolayer MoS2 is an excellent n-type channel material for FETs11-13, with near-ideal subthreshold swing of 65 mV decade−1 and high on/off current ratio up to 106, even after reducing the gate length to 1 nm14. This suggests 2D layered materials are promising new material system to replace silicon to reduce the effects of short-channel effect and continue to increase the chip integration density. Many 2D layered materials have been prepared and explored since the isolation of atomically thin graphene in 200415-18. There is a rich library of 2D layered materials, including conductors (such as graphene19,20), semiconductors (such as black phosphorus (BP)9, transition metal dichalcogenides (TMDCs)21,22 and insulators (such as hexagonal boron nitride (h-BN)23,24). The extensive library of 2D layered materials provides a large potential for practical applications.
For large-scale practical applications, wafer-scale 2D layered materials are indispensable. However, the wafer-scale synthesis process of 2D materials are faced with several challenges. One problem is how to grow single crystalline 2D layered materials with high uniformity and excellent electrical properties on a wafer scale. Currently, the main method of growing single crystal thin films is to control the orientation of the crystal domains. For example, the orientation of the crystal domains is consistent by destroying the energy degeneracy of 2D TMDCs by surface treatment of the substrate17. In addition to the method of treating the substrate surface, it is also possible to achieve direct epitaxial growth of single crystal films on single crystal substrates with specific crystal orientations. Recently, wafer-scale graphene and h-BN have been grown on single-crystalline metallic substrates or molten metal surfaces with identical crystal orientation to avoid grain boundaries during coalescence25-27. However, for 2D semiconductors grown on a single-crystalline substrate, translational grain boundaries still exist due to the presence of imperfectly stitched domains28,29. In order to solve this problem, the seeded epitaxy method can be adopted to grow wafer-scale 2D materials30. In addition to the crystal quality of the films, another problem is the controllability of layer numbers on a wafer scale. Due to the imprecise kinetic control of the layer-by-layer growth of 2D materials, the thickness of the film on the wafer scale is not uniform. Some materials, such as graphene31-33 and TMDCs34-36, have been extensively studied for the preparation of wafer-scale films, but the reality is that preparing high-quality wafer-scale films still remains a big challenge, especially compared to chip-grade single-crystalline silicon. Other materials, such as MXenes, BP, tellurene (Te), and layered oxides, have hardly been reported for their wafer-scale preparation. Therefore, it is of great urgency to review the wafer-scale growth methods of relevant 2D layered materials.
In this review, brief introduction of the representative 2D layered materials was firstly conducted, and their unique physical properties were subsequently discussed. Next, a brief overview of the current status and developments in wafer-scale synthesis approaches was performed, including both “top-down” method (such as liquid metal printing37 and metal-assisted mechanical exfoliation38) and “bottom-up” method (such as chemical vapor deposition (CVD)30,39,40, pulsed laser deposition (PLD)41,42, molecular beam epitaxy (MBE)43, and atomic layer deposition (ALD)44,45). After discussing these methods, several representative examples were provided for integrated electrical and photoelectric devices with the adoption of wafer-scale 2D layered materials. Finally, the challenges and future research directions of wafer-scale synthesis of 2D van der Waals (vdW) materials were discussed.
ClASSES OF 2D LAYERED MATERIALS
VdW 2D layered materials have emerged as a promising material system for next-generation ICs owing to their excellent physical properties and atomically thin structure7,46-48. There is a rich library of 2D layered materials, including conductors, semiconductors with different bandgaps (such as BP and TMDCs), and insulators (such as h-BN). The extensive library of 2D layered materials provides a large potential for heterogeneous integration at the atomic scale. Then, we focused on these vdW materials and discussed their unique physical properties.
Graphene
The lattice structure of graphene is shown in Fig. 1a, the graphene layers interact with each other via weak vdW forces, where the vdW gap is 3.4 Å, and solid covalent bonded carbon atoms in a honeycomb geometry structure can be seen from the top view19. The novel electronic structure of graphene makes it exhibit many unique physical properties, such as excellent transparency49, mechanical strength50 and conductivity51,52. In particular, as a semi-metal, graphene is endowed with extremely high carrier mobility. By guiding the embryonic graphene domains to a good arrangement, the obtained graphene film can achieve the carrier mobility of about 14700 cm2 V−1 s−1 at 4 K (Fig. 1e)15. Besides, due to the Dirac cone band structure, graphene exhibits ambipolar transport properties, and it can be converted from p to n-type when increasing the gate voltage8. It is worth noting that two graphene layers with lattice mismatch show excellent superconducting properties with the magic twisting angle20.
Fig. 1. Structures and physical properties of 2D layered materials. a, Lattice cartoon structure of graphene single layer (up) and AB-stacked bilayer (down). b, Crystal structure of BP with the armchair and zigzag crystal directions53. Reprinted with permission from refs.19,53. © 2012, 2018 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. c, Crystal structure of MoS2. Reprinted with permission from ref.7. © 2011 Nature Publishing Group. d, Lattice cartoon structure of h-BN; the unit cell is represented in red dash lines. Reprinted with permission from ref.72. © 2021 Wiley-VCH GmbH. e, Terahertz large-size mobility mapping of the graphene film grown on sapphire at room temperature. Reprinted with permission from ref.15. © 2021 The Authors. f, The thickness-dependent bandgap of BP. Reprinted with permission from ref.54. © 2020 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim. g, Optical image (left) and electrical characterization (right) of a representative MoS2 device. Reprinted with permission from ref.14. © 2016 American Association for the Advancement of Science. h, Dependence of the bandgap in AA’ stacking configuration on the number of layers. Reprinted with permission from ref.72. © 2021 Wiley-VCH GmbH. (For interpretation of the references to color in this figure legend, the reader is referred to the Web version of this article.) |
Black phosphorus
Similar to graphene, many other monoelemental 2D materials have also been discovered, such as BP9 and tellurene10. Taking BP as an example, each layer of bulk BP exhibits a puckered orthorhombic geometry structure with an armchair vertically staggered hexagonal lattice (Fig. 1b)53. The bandgap of BP changes with the number of layers, ranging from 2.5 eV (monolayer) to 0.1 eV (bulk), covering both near and mid-infrared (MIR) bands (Fig. 1f)54. Moreover, BP exhibits a high carrier mobility of up to about 1000 cm2 V−1 s−1 due to its narrow bandgap55. With a tunable bandgap and high carrier mobility, BP is capable of bridging the gap between graphene and TMDCs.
Transition metal dichalcogenides (TMDCs)
Compared to semi-metallic graphene and insulating h-BN, TMDCs are constituted with a large number of vdW layered materials with tunable bandgaps and variable electronic properties22,56,57. In general, their chemical composition is MX2, where M is transition metal such as molybdenum, tungsten, hafnium, zirconium, tantalum, nickel, and niobium as well as non-transition metals such as gallium, tin, bismuth, indium, and X represents chalcogen such as sulfur, selenium or tellurium. TMDCs materials commonly exhibit a diverse range of structural phases, including the 2H, 1T, 1T′, and Td phases. For instance, in the case of “group VI” TMDCs, the 2H phase, characterized by trigonal prismatic coordination, represents a stable semiconductor and is the most prevalent structure among all phases. Conversely, for the same TMDCs, the 1T phase corresponds to an unstable metallic octahedral coordination. Various methods are commonly employed to induce a transition from the semiconducting 2H phase to the metallic 1T phase58. In contrast, the centrosymmetric distorted nature of the 1T′ phase (in compounds like 1T′-MoTe2 and 1T′-WTe2) can be attributed to zigzag M-M chains within its structure. The Td phase shares many similarities with the 1T′ phase, but it possesses an orthorhombic structure that lacks centrosymmetry. Both these half-metallic states offer researchers ample opportunities for exploring promising and unique properties such as large magnetoresistance effects59, quantum spin Hall effects60, and Weyl semimetal states61. MoS2 is one of the most frequently studied TMDCs with a variable bandgap changing from indirect (bulk) to direct (monolayer)57. MoS2 exhibits both semiconducting 2H (trigonal prismatic phase) and metallic 1T phase (octahedral phase), of which the 2H phase is the most chemically and mechanically stable, and the lattice structure of 2H-MoS2 is illustrated in Fig. 1c2. Many reports have shown that semiconducting 2H MoS2 is an excellent n-type channel material in field effect transistors (FETs), with near-ideal subthreshold swing of about 65 mV decade−1 and an on/off current ratio of about 106, even after reducing the gate length to less than 1 nm (Fig. 1g)14. In addition, rich properties such as valley polarization21, valley Hall effect62, and superconductivity63 have also been observed. The large family of TMDCs, together with their novel properties, show that if wafer-scale synthesis methods are developed, their important role in 2D electronics will be enhanced.
MXenes
The MXenes, which are atomic thin transition metal carbides and nitrides with specific surface groups, belong to a family of 2D materials derived from ternary layered precursors known as MAX phases. Their discovery dates back to 201164. The presence of surface termination enables MXenes to exhibit a hydrophilic surface, which confers a distinct advantage over other 2D materials. For instance, Ti3C2Tx MXene etched by 10% HF does not demonstrate ion exchange capability or intercalation of water; however, the addition of LiCl in 10% HF facilitates these functionalities. The spontaneous intercalation of Li+ cations between the layers of MXene allows for concurrent intercalation of water molecules, thereby significantly widening the interlayer spacing and enabling ex situ ion exchange. The surface groups of MXenes play a crucial role in determining their electronic properties. A theoretical investigation has predicted a wide range of MXenes with diverse surface groups65, including oxygen and hydroxyl terminations. Oxygen-terminated MXenes exhibit high work functions, whereas hydroxyl-terminated MXenes possess remarkably low work functions. Materials with such ultralow work functions are highly desirable for electronic applications. The Ti3C2Tx MXene, for instance, represents a highly conductive 2D metal that exhibits superior conductivity and enhanced transparency compared to graphene66. These inherent characteristics make MXenes highly suitable for diverse applications in next-generation electronics, particularly as exceptional contact materials. Therefore, the growth of large-scale MXenes is imperative to fully harness their potential.
Indium selenide (In2Se3)
The investigation of 2D materials based on III-VI semiconductors has been extensively conducted. Among these compounds, In2Se3 holds significant importance as a representative III-VI compound. A single layer of In2Se3 consists of alternating Se or In atomic layers connected by covalent bonds67. The compound typically exhibits five distinct forms (α, β, γ, δ, κ), which is resulted from varying stacking arrangements of the layers. Among these forms, the α phase is widely acknowledged as possessing the most thermodynamically stable layered structure at ambient conditions. In 2017, Ding et al.68 predicted that the intrinsic prototypical In2Se3 quintuple layer exhibits both spontaneous out-of-plane and in-plane electric polarizations due to the breaking of centrosymmetry. They argued that polarization switching could be achieved by laterally shifting the central Se layer adopting a modest electric field through easily accessible kinetic pathways. In the same year, Zhou et al.69 reported the experimental observation of out-of-plane piezoelectricity and ferroelectricity in 10 nm multilayered α-In2Se3 through a comprehensive analysis of its structural, optical, and electrical properties. Besides, 2D InSe has also attracted significant attention as an ultrathin III-VI semiconductor due to its comparable favorable attributes with those of III-V semiconductors and TMDCs70. These discoveries highlight the significant role of III-VI semiconductors, particularly In2Se3, in the realm of 2D ferroelectric materials.
2D vdW oxides
The interest in 2D materials encompasses the oxide family, including Bi2SiO5, MoO3 and V2O5. The compound Bi2SiO5 is a well-known high-κ dielectric material with an Aurivillius-type layered structure and a wide band gap ranging from 3.5 to 4.4 eV71. Recently, Chen et al.71 reported the exceptional suitability of Bi2SiO5 as a gate dielectric for 2D semiconductors. By employing a facile CVD method, ultrathin monolayer Bi2SiO5 single crystals were successfully synthesized, benefiting from their high dielectric constant (> 30), wide band gap (∼3.8 eV), and substantial breakdown field strength. Effective regulation of carrier density and enhancement of carrier mobility were achieved by utilizing ultrathin Bi2SiO5 nanoflakes as vdW dielectrics and screening layers. The unique electrical properties of 2D vdW oxides also render them an indispensable component for further integration and application in 2D devices.
Hexagonal boron nitride (h-BN)
h-BN, commonly known as white graphite, exhibits a honeycomb structure similar to graphene, whereby the C atoms in each unit cell are replaced by N atoms and B atoms, resulting in a wide bandgap insulator (Fig. 1d). The direct and indirect bandgaps of h-BN change with the number of layers (Fig. 1h)72. Similar to graphene, h-BN is a vdW layered material that can be exfoliated into several atomic layers and has been widely used as dielectric materials23, passivated material73, tunneling barriers74, and insulating substrates23. In addition, h-BN can be doped with carbon to tune electronic properties, such as p-type and n-type doping and bandgap engineering24.
“TOP-DOWN” SYNTHESIS OF 2D MATERIALS
Wafer-scale vdW layered 2D materials are indispensable for realizing large-scale practical applications. Although the wafer-scale synthesis methods for some materials, such as graphene31-33 and TMDCs34-36, have been extensively explored, the preparation of high-quality thin films remains a big challenge. Therefore, it is of great urgency to review the wafer-scale growth methods of 2D materials. These methods can be divided into two types: “top-down” and “bottom-up”. The “top-down” methods, which could reduce the dimensions of bulk materials through mechanical exfoliation, are efficient approaches to prepare large-scale films. In contrast, the “bottom-up” methods refer to the process of assembling materials from atoms or molecules, such as CVD, PLD, MBE and ALD. In this section, a brief overview of the current status and recent developments for the wafer-scale synthesis methods has been conducted. With recent reports of modified technique, the “top-down” methods have been considered as an effective approach to ensure large-area and high-quality films. The advantage lies in the capability to maintain the crystal structure and a high degree of crystallinity in the bulk crystal, rendering it suitable for fabricating films of considerable size and exceptional quality. Specialized equipment or intricate operational procedures are unnecessary. Now, two categories of modified technique are reviewed: liquid metal printing and metal-assisted mechanical exfoliation.
Liquid metal printing
Metal oxides have become a promising platform for thin film optoelectronics and low-energy electronics, such as ultraviolet photodetectors75, optoelectrical transistor array76, short-channel transistors4 and non-volatile memory (NVM)77. However, the traditional vacuum-based methods, such as ALD and sputtering, are of the disadvantages of high cost and lower material utilization78. Although solution processing materials have low capital expenditures and can yield ultrathin and uniform films, it requires higher thermal budget to remove the solvent contaminants. Consequently, it remains a challenge to prepare high quality metal oxides films at a wafer scale79. Liquid metals could form a Cabrera-Mott surface oxidization when exposed to air. Due to the weak vdW interaction between them, the metal oxides films can be prepared by liquid metal printing methods80. In 2017, Zavabeti et al.81 firstly reported liquid metal surface oxide synthesis for preparing 2D metal oxides. The gallium-based eutectic alloys, such as galinstan and EGaIn (containing gallium and indium), are featured with a Cabrera-Mott oxide layer at the surface, and the oxide layer with maximum reduction of Gibbs free energy is dominant. They employed alloys as a reaction environment to prepare several kinds of 2D metal oxides, including Ga2O3, HfO2, Al2O3 and Gd2O3. Their results demonstrate that thin oxide film at the surface can be manipulated by selecting different eutectic alloys basis of the ΔGf for oxide layer formation.
Additionally, since the Cabrera-Mott oxide layer on the surface of the liquid metal can be regenerated in milliseconds, liquid metal printed oxide films have no inherent size limitations37. Recently, Ye et al.82 demonstrated a roller-based liquid metal printing method (Fig. 2a) for producing oxide layers into wafer-scale thin films (covering areas over 10 to 100 cm2). They adopted a flexible rubber roller to push liquid metal at high speed (1 to 20 cm s−1) and with uniform pressure (6 N cm−1). Since the interaction between oxide layer and the O-terminated substrates is stronger than that between oxide layer and liquid metal, the metal oxides films can remain on the target substrate such as flexible polyimide substrate. Adopting the continuous liquid metal printing approach, the thickness of the metal oxide film can be manipulated by selecting printing times, and the multilayer superlattices consisting of periodic alternating oxide layers of GaOx and InOx can be prepared. Fig. 2b displays large area scanning optical microscope images of single oxide and multilayer superlattice films patterned by the continuous liquid metal printing method, which indicates that large area uniformity can be achieved. Besides, the multilayer superlattices consisting of one layer of GaOx and two layers of InOx were characterized with the adoption of high resolution transmission electron microscope (HRTEM) (Fig. 2c). Although the thickness of oxide film is only 3.5 nm per layer, the crystallite size of InOx film is ranged between 10 and 30 nm. The grain size of the InOx film prepared by liquid metal printing method is significantly larger than that prepared by the sputtered83 and sol-gel method84. This is mainly ascribed to the elimination of any remaining organic species during the printing process.
Fig. 2. “Top-down” synthesis of 2D materials. a, A roller-based schematic for high-speed liquid metal printing, the inset shows that Cabrera-Mott surface oxidation forming a 2-4 nm thick oxide skin in a few milliseconds. b, |
In addition, given the advantages of this approach, such as high quality, large area, and ultrathin thickness, many films such as indium tin oxide85, GaInSnO86, p-Ga2O387 and GaPO488 have been prepared adopting this approach. This method can also promote the development of heterostructures, such as Ga2O3/MoS2 heterostructure89, which can protect and passivate monolayer TMDCs on a large scale. The liquid metal printing approach provides an efficient, low cost, simple and reliable strategy for the wafer-scale synthesis methods of 2D materials. Although the film produced through liquid metal printing exhibits a large area and high efficiency, its crystal quality is relatively low, typically being polycrystalline or amorphous in nature. Hence, it is of great urgency to explore strategies for transforming polycrystalline oxide films into single crystal films.
Metal-assisted mechanical exfoliation
Due to the in-plane stability and weak interlayer interactions of vdW materials, the adoption of adhesive tape to exfoliate monolayers has currently become an efficient and inexpensive method. In the past 18 years, mechanical exfoliation has always been the main preparation approach to explore the unique properties of emerging 2D materials. Most unique properties of graphene, such as superconductivity20 and Hall effect90, were mainly tested on thin flakes prepared by mechanical exfoliation, but were suppressed in material synthesized by other approach16. However, the lateral sizes of exfoliated flakes are only micrometer scale, and the process is time-consuming and of low yield. Such problems of mechanical exfoliation limit their utility for wafer-scale preparation of 2D material. These challenges can be solved by selecting suitable substrates that exhibit a greater interfacial toughness than vdW interface, and this allows the complete film to be exfoliated and transferred from the bulk crystal.
In 2018, Shim et al.38 introduced a layer-resolved splitting method on the basis of differences in the interfacial toughness, which can exfoliate wafer-scale (5-cm diameter) thin films from thick 2D materials. They selected nickel as an atomic-scale adhesive due to the fact that the interfacial toughness between vdW materials and nickel is larger than interlayer interactions of vdW materials. Therefore, the liftoff process of nickel/vdW material stacks can separate the vdW material-sapphire substrate interface, which exhibits the minimal interfacial toughness, and the 2D materials can be precisely isolated from the bulk materials. They demonstrated that the layer-resolved splitting method allow clean separation monolayers of vdW materials at the wafer scale from the bulk materials. In addition, Huang et al.91 theorized that Au is promising for wafer-scale exfoliation of many 2D materials by density functional theory calculations. To verify the theoretical prediction, they realized the Au-assisted exfoliation of vdW bulk materials. Firstly, adhesive tape with 2D bulk materials was placed on the substrate, on which Cr/Au was deposited. The adhesive tape was subsequently lifted and the major portion of the 2D material removed, leaving a large area of monolayer flake on the substrate. They adopted the Au-assisted exfoliation approach to split other 40 materials, and obtained large area of high-quality monolayer films of each material. Besides TMDCs, the types of materials contain BP, metal trichlorides, magnetic compounds, metal monochalcogenides and black arsenic.
Furthermore, the crack propagation depth of the bulk 2D materials can be adjusted by adjusting the residual stress of the metal film. Recently, Moon et al.92 reported an atomic spalling method, where TMDCs films can be prepared with a controllable number of layers. By modulating the residual stress of Ag film, monolayer, bilayer, and trilayer TMDCs (such as MoS2, MoSe2, and WSe2) were exfoliated from the bulk materials. The schematic of the atomic spalling process is shown in Fig. 2d. Firstly, a 70 nm Ag film was deposited on the bulk materials as a stressor film. When the applied stress acted on the Ag film, the cracks firstly occurred at the edges of the bulk crystals. Without the lateral stress direction of crack propagation, the crack spread along the parallel direction of the interface between Ag film and bulk crystal, allowing the top crystal layers to be exfoliated flat. They estimated the spontaneous, controlled, and subcritical spalling window of the Ag/MoS2 stack calculated by S-H model (Fig. 2e). As the thickness of stressor film increased, the area of the controlled spalling window tends to be narrower. To adjust the residual stress of the stressor film, they changed the stress release time during electron beam evaporation process (Fig. 2f). With increasing residual stress, the number of exfoliated MoS2 layers was changed from trilayer to bilayer and monolayer (Fig. 2g). In summary, metal-assisted mechanical exfoliation shows great advantages in preparing films that inherit the bulk crystal structures. However, metal-assisted mechanical exfoliation offers distinct advantages in producing high-quality 2D materials films on a large scale, inadequate material-substrate interactions still lead to suboptimal exfoliation performance. Consequently, there is a urgent need for more suitable exfoliation processes or rationalized exfoliation media, which can serve as pivotal breakthroughs in advancing this technology.
“BOTTOM-UP” SYNTHESIS OF 2D MATERIALS
Chemical vapor deposition (CVD)
The mechanical exfoliation method, which is known as the “top-down” approach, is highly suitable for the research purposes that demand ultra-high-quality monolayers93,94. However, it is not well suited for large-scale production. To overcome this limitation, “bottom-up” methods like CVD have been extensively investigated30,39,40, CVD is the most extensively used process for direct synthesis of wafer-scale 2D materials owing to its simplicity and efficiency95,96. This CVD technique enables the production of 12-inch 2D materials films97,98. However, wafer-scale 2D films produced by CVD on conventional polycrystalline substrates (e.g., SiO2/Si) typically have multiple grain boundaries, resulting in severe crystal quality degradation18. As a solution, epitaxial growth of highly oriented 2D materials on single crystal substrates has been proposed. The advantage of this approach is that lattice matching on a single-crystal substrate facilitates the synthesis of high-quality single crystals from orientation-grown 2D material.
Later, Aljarb et al. reported the synthesis of highly oriented monolayer MoS2 domains on c-plane sapphire adopting a low-pressure CVD technique (Fig. 3a)99. The concentration of MoO3 decreases rapidly with increasing distance between the precursor and substrate (Fig. 3b, positions I, II, and III). The concentration of MoO3 decreases rapidly while the sulfur concentration remains almost constant. The high S/MoO3 ratio at location III contributes to the formation of relatively small seeds that rotate easily and align well with the sapphire lattice, resulting in highly oriented growth. Ma et al. employed CVD to fabricate a wafer-scale single-crystal trilayer h-BN film on a single-crystal substrate Ni (111)100. Uniformly aligned h-BN islands were discovered to grow early on the single-crystal substrate Ni (111) and eventually consolidate into a single-crystal film. The photograph of a 2 cm × 5 cm trilayer h-BN film over a SiO2 (300 nm)/Si substrate demonstrates uniform contrast, indicating uniform film thickness (Fig. 3c). The atomic force microscopy (AFM) image shows that the thickness of the layer is 1.2 nm (see inset of Fig. 3c). They investigated the growth of h-BN islands throughout time. After 1 min of growth, the AFM image revealed that most h-BN islands were docked at the step edges of the nickel surface (Fig. 3d). After 30 min of growth, most h-BN islands were no longer attached to the step edges. Fig. 3e demonstrates that the binding energy of a h-BN nucleus (N7B6) at the step edges is about 2 eV higher than that at the terrace, so the configuration C in Fig. 3e is preferred. Li et al. reported the wafer-scale synthesis of 2-inch single-crystal monolayer graphene on Al2O3 (0001)101. To begin with, single-crystal Cu (111) film was formed by annealing polycrystalline Cu foil on Al2O3 (0001). Graphene was epitaxially grown at the interface between Cu (111) and Al2O3 (0001) by diffusion of C atoms from the open Cu (111) surface with the adoption of the multi-cycle plasma etching CVD method. The Cu (111) film was then peeled off by fast heating after immersion in liquid nitrogen, while the graphene film remained intact on the sapphire substrate. Compared to the pristine Al2O3 (0001) wafer, graphene/Al2O3 (0001) exhibits weak visible-light absorption in the ultraviolet-visible-light (UV-vis) transmittance spectra at the wavelengths of 350 to 800 nm (Fig. 3f). The hexagonal shape and sharp edges of aligned graphene islands indicate the high quality of the as-grown graphene (Fig. 3g). The graphene surfaces were analyzed using AFM, which revealed a smooth surface for the graphene grown on Al2O3 (Fig. 3h).
Fig. 3. Wafer-scale synthesis of 2D materials via CVD. a, |
The synthesis of graphene and h-BN on metal substrates at wafer-scale has been reported100,102. However, achieving wafer-scale synthesis of 2D TMDCs on insulating substrates remains challenging due to the distinct growth kinetics36,103. Wang et al. reported epitaxial synthesis of 2-inch single-crystal monolayer WS2 on a-plane sapphire17. They found that epitaxial growth of monolayer WS2 is driven by a double-coupled guidance mechanism: that is, the interactions between the sapphire planes and WS2 lead to WS2 crystal nucleation that energetically favors two antiparallel orientations, and the coupling between the sapphire step edges and WS2 energetically breaks the antiparallel orientation symmetry. These two interactions result in almost all WS2 islands being in unidirectional alignment. Previous studies have reported that the nucleation of 2D materials near the edge of the substrate step is energetically more dominant than nucleation on a terrace, and that the interaction between the edge of 2D materials and the substrate step determines the alignment of 2D materials103. Recently, Fu et al. reported that the step edges of the c-plane sapphire are not a necessary factor for the unidirectional alignment of TMDCs104. Instead, the interaction between 2D TMDCs grains and the exposed oxygen-aluminum atomic surfaces leads to a minimal energy configuration between TMDCs grains and c-plane sapphire, which facilitates the growth of unidirectional alignment of 2D TMDCs. Therefore, the preparation of appropriate atomic surface structures rather than step edges is crucial for single-crystal growth.
In summary, the synthesis of wafer-scale 2D materials on a single crystal substrate adopting the CVD approach offers several advantages, including oriented growth and high-quality growth. However, it is difficult to precisely control the precursor vapor concentration and stable distribution in the CVD method, which leads to poor reproducibility and uniformity in the large-scale synthesis of 2D materials. Challenges related to uniformity, defect control, and layer transfer need to be addressed so as to fully exploit the potential of the CVD approach for wafer-scale synthesis of high-quality 2D materials.
Metal organic chemical vapor deposition (MOCVD)
MOCVD is a CVD method which uses high-purity metal organic compounds as precursors105. Compared to the conventional CVD approach, MOCVD has a relatively low deposition temperature106,107, allows the deposition of ultrathin or even atomic layers over the entire surface of a special structure, and allows most TMDCs to be deposited at wafer scale on any substrate. The MOCVD technique enables the fabrication of 8-inch 2D materials films108.
Lee et al. reported triatomic thick waveguides (δ-waveguides) based on wafer-scale molybdenum disulfide (MoS2) monolayers, which can guide visible and near-infrared light at millimeter distances with low loss and efficient coupling109. They adopted MOCVD to grow continuous wafer-scale MoS2 monolayer films. The monolayer MoS2 films were peeled off the growth substrate and embedded within a silicone elastomer (polydimethylsiloxane) to provide a centimeter-scale stable, uniform optical environment. Hoang et al. reported the successful synthesis of high-quality 4-inch MoS2 on polymer and ultrathin glass substrates adopting MOCVD at a low temperature of 150 °C110. The low-temperature growth of MoS2 on flexible substrates exhibits a low S-hole concentration, which enables the fabricated n-type FETs to operate in the enhanced mode with a positive threshold voltage, which is critical to low-power operation by reducing the leakage current. In addition, the electronics and photodetectors were fabricated directly on the flexible substrate without the use of an additional transfer process, which avoids contamination as well as the formation of wrinkles and tears, thus preserving the high quality of MoS2.
Unlike conventional hot-wall MOCVD, in a cold-wall CVD, only the substrate is heated, while the chamber walls are not heated. Selectively heated cold-wall MOCVD reduces possible side reactions in the gas phase at high temperatures, thus reducing contamination of the film and chamber walls111,112. Therefore, in cold-wall CVD, precursor decomposition and chemical reactions are confined to the vicinity of the heated substrate, providing a simplified environment for controlling reaction kinetics.
Seol et al. reported high-throughput growth of 6-inch wafer-scale monolayers of MoS2 and WS2 in less than 12 min, enabling direct compatibility with scalable batch processing and device integration113. They achieved a layer-by-layer growth mode by suppressing secondary nucleation and driving lateral growth through periodic interruptions in precursor supply. The prepared MoS2 films exhibit good spatial homogeneity and high quality with well-stitched grain boundaries. Jia et al. reported that the batch preparation of graphene films with millimeter-scale domains of 10 cm × 10 cm size was successfully achieved in the cold-wall CVD system by employing a graphite carrier to regulate the flow field distribution during the graphene growth process114. On this basis, they further reduced the defect density of graphene adopting the etch-repair method and successfully achieved the controlled growth of high-quality graphene films.
The MOCVD for the preparation of 2D materials is considered to be one of the most suitable growth methods for industrial production. However, MOCVD is expensive to purchase and operate, including expensive equipment purchase, installation and maintenance costs, as well as the high cost of metal-organic precursors. Some metal-organic precursors used in MOCVD can be toxic and require proper safety precautions and waste disposal measures.
Two-step conversion method
The two-step conversion method utilizes chemical changes to transform precursor films into wafer-scale 2D films. The two-step conversion method enables the fabrication of 4-inch 2D materials films115. Firstly, the precursor film is deposited on a growth substrate by thermal evaporation, electron beam evaporation, magnetron sputtering, PLD, and spin coating. Subsequently, a chemical reaction conversion is carried out to synthesize the wafer-scale 2D films116,117.
Xu et al. reported the solid-solid phase transition and recrystallization process in 1T′-MoTe2 thin films and successfully produced 2D semiconducting 1-inch 2H-MoTe2 single-crystal thin films on amorphous SiO2/Si surfaces by modifying the growth process of the seed crystal method30. They initially deposited a Mo film on the substrate with the adoption of magnetron sputtering, followed by tellurization of the film into 1T′-phase MoTe2. Small-sized 2H-MoTe2 seed crystals were then transferred to the center of the film. The wafers were covered with a 30 nm thick layer of Al2O3 to prevent random 2H-phase nucleation. A small hole was created between MoTe2 and Al2O3. The presence of small holes in the seed crystals allowed additional Te to enter the substrate-2D material interface during the heating process, driving the phase transition and epitaxial growth of 1T′-phase MoTe2 to 2H-MoTe2. They further reported a general synthesis technique for heterogeneous epitaxial growth of semiconductor 2H-MoTe2 thin films on substrates with different crystal symmetries, different lattice constants, and three-dimensional architectures, which overcomes the limitation of substrates for heterogeneous epitaxy118. Zeng et al. reported the vdW epitaxial growth of wafer-scale 2D PtTe2 layers by a simple Te vapor conversion method119. They used pre-deposited Pt films as precursors and then tellurized the films by CVD for vdW epitaxial growth of 2D PtTe2 layers at wafer scale.
The two-step conversion method can control the thickness of the prepared film by controlling the thickness of the precursor. However, it is difficult to prepare continuous monolayer films with this method. In addition, the 2D films prepared by the two-step conversion method exhibit poor crystalline quality and electronic properties and require a higher quality of the precursor film.
Pulsed laser deposition (PLD)
Recently, conventional PLD has received some attention for wafer-scale synthesis of 2D materials41. PLD techniques utilize pulsed laser to ablate the desired target to create stoichiometric vapors that form a plasma plume for deposition on the heated substrate120. PLD is known for transferring target materials directly onto a substrate42. The process of fabricating films through PLD is highly controllable and customizable, which enables the realization of various functions and structures. This can be achieved by effectively controlling the deposition factors such as material composition, laser energy density, air pressure, gas, substrate material and deposition angle. The PLD technique enables the fabrication of 4-inch 2D materials films121. In addition, PLD can be employed at room temperature. The majority of 2D semiconducting materials produced by PLD, particularly TMDCs, are seriously flawed and exhibit poor electrical properties. Due to the low vaporization temperature and high volatility of chalcogen atoms, insufficient chalcogen can occur during PLD fabrication of 2D materials, and an excess of chalcogen is required to compensate for the loss122.
Jaiswal et al. reported a condensed-phase or amorphous-mediated crystallization (AMPC) method to synthesize 4-inch bilayer and few-layer MoS2 and WSe2123. This method employs a room-temperature PLD approach to deposit and form amorphous precursors with controlled thickness, followed by an annealing process to transform the amorphous materials into a crystalline structure (Fig. 4a-c). This method maintains the stoichiometry of the precursor during deposition and crystallization, leading to wafer-scale synthesis of crystalline 2D materials (Fig. 4d). Wu et al. reported the synthesis of centimeter-scale high quality BP on mica through PLD under ultra-high vacuum conditions124. This strategy utilizes bulk single-crystal BP as a source and mica flakes from the newly exfoliated surface as a substrate. The plasma-activated zone triggered by laser ablation of the target provides highly favorable conditions for the formation and transport of large BP clusters, thus promoting the large-scale growth of several layers of BP film (Fig. 4e). Compared to bare mica, the grown BP films have different reflective colors, with uniform color contrasts spread over the 1 cm2 mica surface (Fig. 4f). The AFM image shows that the thickness from bilayer BP film is 1.1 nm (Fig. 4g). Juvaid et al. reported the direct growth of 4-inch reduced graphene oxide (rGO) like films with the adoption of the PLD method (Fig. 4h)121. The fabricated films are called rGO like films due to the fact that their chemical, structural, and physical properties are similar to those of rGO. The main advantage of the PLD process is that the beam size remains constant over the entire scanning range and the dwell time on the target is adjusted, which allows the films to be grown uniformly on 4-inch substrates and easily scaled up to 8-inch substrates (Fig. 4i). Han et al. reported the growth of T-Nb2O5 thin films on LaAlO3 (LAO) and (La0.18Sr0.82)(Al0.59Ta0.41)O3 (LSAT) (001) and (110) oriented substrates with the adoption of the PLD technique. When using a conventional (001)-oriented substrate, multiple domains with quadruple symmetry were formed, which were rotated 90° in the plane with respect to each other. In contrast, a doubly symmetric T-Nb2O5 (180) film was grown on the (110) oriented substrate. The in-plane geometrical anisotropy of the (110)-oriented substrate may have prevented the formation of multiple domains. Both films exhibit vertically oriented two-dimensional ionic transport channels, which are ideal for Li ion transport125. In conclusion, the PLD method holds great promise for growing high-quality, large-scale 2D elemental materials (such as BP and Te) and oxide materials.
Fig. 4. Wafer-scale synthesis of 2D materials via PLD. a, Schematic illustration of a typical pulsed laser deposition used for AMPC method. b, |
The PLD method can be adopted for large scale synthesis of 2D TMDCs, but the crystal quality of the fabricated 2D TMDCs are not as good as that prepared by CVD. The PLD technique is limited to a certain range of materials, which may restrict the types of 2D materials that can be produced. And the equipment and maintenance costs associated with the PLD technique can be high, making it less accessible for industry.
Molecular beam epitaxy (MBE)
The MBE technique has emerged as a highly promising method for the large-scale synthesis of 2D materials, including graphene, TMDCs and BP. Moreover, MBE enables the fabrication of 8-inch films of these 2D materials126. MBE allows for precise control over the growth parameters, such as temperature, pressure and flux rates, enabling the growth of high-quality 2D materials with atomic-scale precision43. MBE operates under ultra-high vacuum conditions, which could minimize contamination during the growth process. In addition, MBE allows for precise thickness control due to slow growth rates and limiting layer by layer growth.
Liu et al. reported the wafer-scale synthesis of 3-inch γ-InSe on the Si (111) 7 × 7 substrate via MBE127. The schematic shows the components of the MBE reactor and the crystal structure of InSe (Fig. 5a). The substrate is positioned in an ultrahigh vacuum chamber on a stage maintained at the desired temperature. Precursors are loaded into effusion cells and evaporated in pulses within the ultrahigh vacuum chamber, undergoing reactions on the surface of substrate. Wang et al. successfully synthesized wafer-scale vdW 2D material Fe4GeTe2 with Tc reaching ∼530 K by MBE128. The crystal structure of Fe4GeTe2 is rhombohedral with an R-3m space group (Fig. 5b). The HRTEM image in Fig. 5c further demonstrates the vdW stacking structure. Xia et al. reported wafer-scale synthesis of single-crystal MoSe2 or WSe2 at low temperature on Au (111) by MBE129. Figs. 5d-f illustrate the growth process during the nucleation, coalescence, and completion stages with SEM images of samples that stopped growing at the corresponding stages. Fig. 5g illustrates a photograph of an epitaxial 2-inch MoSe2 film grown on Au (111) film. Fig. 5h represents the sequential deposition of multilayer TMDCs films, where subsequent layers can cross over the gold platform and the growing MoSe2, which results in a continuous film on top. Li et al. reported wafer-scale synthesis of Fe-doped Fe5+xGeTe2 thin films by MBE130. Fig. 5i shows the high-angle annular dark-field (HAADF) photograph of a Fe7.05GeTe2 thin film. There were no Fe clusters or visible grain boundaries in the sample. TEM measurements showed that there existed no significant grain boundaries in the sample, indicating the absence of other phases and iron clusters (Fig. 5j). Liu et al. have successfully prepared large-scale, high-quality monolayer Fe (Te, Se) high-temperature superconducting thin films on strontium titanate substrates with the adoption of ultra-high vacuum MBE, with a superconducting energy gap being as high as 18 meV, which is much larger than that of bulk Fe (Te, Se)131. Song et al. used MBE to realize a high-quality monolayer 1T-ZrTe2 thin film preparation and revealed experimental evidence for the existence of a pre-formed exciton gas phase in the Bose-Einstein condensation limit by angle-resolved photoelectron spectroscopy and scanning tunneling microscopy132. He et al. have successfully fabricated 2H MoTe2 film on a 2 inch SiO2/Si wafer using MBE with 100% monolayer coverage133. However, the film exhibited a polycrystalline structure with random domain orientations. Fu et al. achieved the growth of highly-oriented monolayer MoS2 films adopting MBE on 2 inch. h-BN/sapphire substrates134. They were able to achieve 98.3% zero aligned domain orientation by employing a low Mo precursor flux during the growth.
Fig. 5. Wafer-scale synthesis of 2D materials via MBE. a, Schematic of MBE reactor for InSe growth on 3 inch Si(111) wafer. Reprinted with permission from ref.127. © 2023 American Chemical Society. b, |
In summary, the growth of 2D material films by MBE on a wafer scale is an effective method for controlling domain orientation and the number of atomic layers. However, the complexity of the required ultra-high vacuum system and the sensitivity of the growth environment limit its industrial application. As a result, MBE-grown 2D material films primarily serve as a crucial research and development tool.
Atomic layer deposition (ALD)
ALD appears to be the most suitable technique for synthesizing 2D materials at low temperatures due to its simplicity, versatility, and precise control over thickness44. ALD relies on self-terminated surface reactions, where the precursors remain separate and react solely with surface species in a self-limiting manner. This results in the formation of a single atomic layer per cycle. The reaction is well contained on the substrate surface, with minimal reactions occurring in the vapor phase. Each surface reaction is followed by a purge step to remove any unreacted precursors and by-products. The sequence of reactant-surface reactions and purges constitutes a cycle135. Owing to the self-limiting nature of ALD reactions, the thickness of the deposited film can be precisely controlled by adjusting the number of cycles. Therefore, ALD technology has emerged as a highly promising approach for the large-scale synthesis of 2D materials, which enables the synthesis of 8-inch films with exceptional precision and control136.
Kim et al. reported the wafer-scale synthesis of monoelemental vdW tellurium (Te) films on SiO2/Si without annealing by a rationally designed ALD process at the low temperature of 50 °C137. Through the introduction of bifunctional co-reactants and the adoption of the so-called repetitive dosing technique, the Te films exhibit excellent homogeneity and crystallinity, precise layer controllability, and complete coverage of 100% steps. Fig. 6a illustrates a schematic of a showerhead-type reactor designed to apply the major technological advantages of ALD growth of vdW Te films. They successfully realized wafer-scale synthesis of 4 inch. Te thin films, where the left bare substrate is used for comparison. The merged plot of the E2 and A1 modes shows high uniformity (Fig. 6b). A typical Raman spectrum of Te indicates well-formed intrachain covalent and vdW-coupled interchain bonds (Fig. 6c). Kim et al. successfully synthesized wafer-scale monolayer MoS2 films in one ALD cycle adopting a novel ALD process138. A H2S feed step and post-deposition annealing in an H2S atmosphere resulted in the formation of crystalline monolayer MoS2 (Fig. 6d). The plan-view image (Fig. 6e) indicates that the MoS2 monolayer is well-crystallized without any obvious crystal defects. Diffraction patterns derived from fast Fourier transform (FFT) analyses (Fig. 6e, inset) confirm a high-quality single crystal with hexagonal symmetry. The measured plane spacing is about 0.29 nm, which is corresponding to the (100) plane of MoS2 crystals. Photograph of a 4-inch bare SiO2/Si wafer (left) and monolayer MoS2 grown using the adsorbate control (AC) ALD process on a 4-inch SiO2/Si wafer (right) is shown in Fig. 6f. The color contrast demonstrates uniform contrast, indicating uniform film thickness. Guo et al. investigated the deposition temperature, growth mechanism, annealing conditions and Nb doping of WS2 to synthesize high-quality wafer-scale n-type and p-type WS2 films by ALD139. Fig. 6g demonstrates one typical cycle of the WS2 ALD synthesis process. In Fig. 6h, WS2 film was etched by reactive ion etching (RIE) to determine the film thickness. AFM results reveal that the thickness of WS2 film is 5.50 nm for 400 cycles (Fig. 6h). Fig. 6i shows the thickness at nine locations across the 2-inch wafer, ranging from 5.31 nm to 5.76 nm, with an average thickness of 5.49 nm, indicating that the thickness of wafer-scale WS2 is highly uniform.
Fig. 6. Wafer-scale synthesis of 2D materials via ALD. a, Schematic illustration of the shower-head type ALD reactor for fabricating Te films. b-c, |
2D semiconductor materials with a non-zero bandgap, ultimate channel thickness, and high mobility can significantly increase the gate modulation capability, which makes them a promising electronic material to continue extending Moore's law140,141. However, due to the absence of dangling bonds on the surface of 2D materials, it is impossible to deposit a high-quality gate dielectric layer through the conventional ALD processes, which results in the fact that the interface states and equivalent oxide thicknesses are much higher than those of silicon-based complementary metal oxide semiconductor transistors. Lu et al. reported a dry dielectric integration strategy capable of transferring wafer-scale high-κ dielectrics on 2D semiconductors142. By utilizing an ultrathin buffer layer, thin dielectrics of Al2O3 or HfO2 below 3 nm can be pre-deposited and then mechanically dry-transferred onto the top of a MoS2 monolayer. Li et al. demonstrated a technique for integrating ultrathin high-κ dielectric layers onto graphene, BN, and TMDCs143. The method employs 3,4,9,10-perylenetetracarboxylic dianhydride (PTCDA) molecular crystals as the crystalline seed layer for ALD-prepared dielectric layers, where PTCDA is noncovalently bonded to a 2D material. The thickness of the molecular crystals can be reduced to the monolayer limit (∼0.3 nm) by self-limiting epitaxial growth. Yang et al. reported the ALD growth mechanism of WS2144. They found that the growth of WS2 is controlled by variations in nucleation densities at different stages. The initial growth of the island is characterized by a lateral mechanism that arises from the low densities of nucleation on the surface of the substrate. Conversely, the subsequent vertical growth mechanism is observed due to the increased densities of nucleation on the films that have been deposited. With this understanding, film growth was optimized. The average grain size measured was 50 nm, while the maximum grain diameter reached 108 nm.
In summary, the ALD process allows precise control of film thickness to produce wafer-scale monolayer and multilayer films of 2D materials. However, higher processing temperatures and additional annealing processes are typically required by ALD-grown vdW materials to crystallize45. And the collection of ALD-producible vdW materials is very limited due to the lack of customized process designs for specific materials.
APPLICATIONS OF LARGE-SCALE 2D FILMS
Various 2D materials and various ways of large-scale synthesis have been discussed above, which facilitates the large-scale application of 2D materials in practical devices, including logic circuits108,145, memory transistor arrays146-148, supercapacitor arrays149, photodetector arrays150,151 and micro light-emitting-diode arrays152. The performance of devices is significantly influenced by the fabrication techniques employed for 2D materials. Variations in synthesis temperature, domain size, defect density, and electrical properties resulting from different methods could directly impact the device performance. “Top-down” approaches, such as metal-assisted mechanical exfoliation, can yield high-quality and crystalline 2D films at low synthesis temperatures; however, their irregular shape and small size render them unsuitable for wafer-scale fabrication and integration. On the other hand, while various “bottom-up” methods like PLD, ALD, and MBE have been explored for growing large-area 2D films, CVD emerges as the most viable option for integrated devices due to its ability to provide uniform and crystalline films along with the requirements of high throughput, cost effectiveness and scalability. Notably, CVD enables the production of relatively high-quality 2D films under atmospheric or low pressure conditions while facilitating easy upscaling by increasing chamber size. However, it is of great importantance to acknowledge that the requirement of elevated synthesis temperatures in the CVD process may pose challenges for industrialization. In this section, several representative examples will be provided for integrated electrical and photoelectric devices with the adoption of large-scale 2D materials film.
Electrical devices/circuits
Firstly, FETs serve as the fundamental and pivotal building blocks in electronics. Regrettably, with silicon-based transistors advancing towards sub-10 nm technology nodes, two prominent technical challenges emerge as notable impediments. Firstly, the tunability of channel current flow was hampered by the short channel effect when the channel length diminishes below 10 nm153. Furthermore, future electronic devices necessitate enhanced flexibility, reduced power consumption, heightened performance, and increased multifunctionality. However, the large-scale growth approaches of CVD enables the exploitation of 2D materials, providing exceptional mechanical flexibility and surfaces devoid of dangling bonds that exhibit superior carrier mobility and on/off ratio in FETs154. Fig. 7a-c shows the wafer-scale energy-efficient flexible ICs based on monolayer MoS2 epitaxially grown on sapphire via an oxygen-assisted CVD approach fabricated by Tang et al.155. The optical image of the 4 × 4 cm2 integrated FETs on the polyethylene terephthalate substrate is shown in Fig. 7a. Fig. 7b presents a schematic representation of an individual buried gate MoS2 device. To achieve lower driving voltage, efficient electrostatic gating is enabled through the utilization of ultra-thin high-κ dielectric HfO2. Due to the challenges associated with depositing ultra-thin high-κ dielectric medium on MoS2, they employed a buried Ti-Au-Ti structure as the local back gate electrode and successfully integrated ultra-thin HfO2 as the dielectric layer along with ML-MoS2 as the channel material and Au as the electrode material. As shown in Fig. 7c, the logic gates, the ring oscillator, and stage 11 ring oscillator all work reliably below the 1 V supply voltages, which shows excellent spatial uniformity and a high device yield of > 96%. This work contributes to the development of the portable, wearable, and implantable electronics. Kwon et al. also adopted a commercial groove-printing process to manufacture a wafer-scale MoS2-based transistor arrays, obtaining a high carrier mobility 80.0 cm2 V−1 s−1, and creating various logic gates and static random-access memory156. Xu et al. reported a dry dielectric integration strategy that enables the transfer of wafer-scale and high-κ dielectrics on top of 2D semiconductors with well-controlled thickness, uniformity and scalability, which is compatible with the standard ALD process with well-controlled thickness and uniformity157. There are also reports on the zero-bias power detector implemented based on FETs158, the device arrays based on FinFETs159, and so on.
Fig. 7. Integrated electric devices using large-scale 2D layered materials. |
Furthermore, the utilization of electronic memory devices has become ubiquitous in contemporary information technologies, revolutionizing the acquisition and manipulation of data154. In today's era of exponential data growth, electronic memory devices are required to possess attributes such as high capacity, rapid read/write speeds, long-term data retention, scalability and low power consumption. 2D materials synthesized via CVD exhibit atomic thinness and adjustable bandgaps, making them a highly promising solution to overcome the limitations associated with traditional von Neumann architectures. Some teams have also published relevant papers on the application of 2D ferroelectric semiconductors in memory transistors. Han et al. employed the 2D In2Se3 thin film directly grown by CVD to obtain the full spectrum of auxiliary electric, ferroelectric and antiferroelectric characteristics, and prepared selenide storage transistors based on β-, β′- and α-In2Se3 thin film160. Fig. 7d shows the storage transistor array image prepared on the centimeter-scale β′-In2Se3. The schematic of the ferroelectric FETs (Fe-FETs) and the corresponding band diagrams are shown in Fig. 7e. The Hysteresis transfer characteristic loops of α-In2Se3 devices at different source leakage voltages (Vds) are shown in Fig. 7f. Compared with β- or β′- In2Se3, the device with the adoption of α-In2Se3 film exhibits an ultra-large hysteresis window of about 24.1 V and high mobility up to 53.0 cm2 V−1 s−1, which is a strong candidate for next-generation storage computing equipment. Based on this, the authors constructed storage transistors based on β′-α 2D transverse heterophase connection, which has a wider hysteresis window and larger NVM characteristics than single-phase devices, but this device has not yet undergone large-scale integration. Resistive random access memories based on the synthesis of uniform large-area multilayer MoS2 by thermally decomposing ammonium tetrathiomolybdate was provided by Zhuang et al.161 The yield of the array storage unit is about 94.1%, and the devices all show bipolar resistive state behavior, with relatively low operation voltage and variability (12.0% σD and 12.1% σC).
Due to the development of ultrathin 2D heterostructures with high crystallinity, the rapid transmission of charges through the n-p hetero-junction provides an important basis for the development of high-performance energy storage devices. Xu et al. prepared supercapacitors with a 2D conformal SnO2-Ga2O3 n-p heterostructure as the electrode by the ALD technique162. Fig. 7g shows the optical image of a Si/SiO2 wafer with gold electrodes, the insert is the 1.0 cm × 1.0 cm element for the application of supercapacitors. Fig. 7h shows the detailed structure of individual devices. Fig. 7i shows the high specific capacitance of 167 F g−1 at 7.69 A g−1 of SnO2-Ga2O3 n-p heterostructure after annealing at 250 °C for 1 h in air. Moreover, the sub-10nm-thick n-p heterostructure showed high capacitance retention (∼92.55%) and cycle stability even after 10,000 continuous cycles. Moreover, the developed heterostructures can be successfully produced with different thicknesses and shapes, which greatly reduces its manufacturing cost during the commercialization process. The results will provide the way for the future development of micro-but efficient 2D energy storage devices. In addition, some researchers have also explored the electrocatalytic properties163-166 of 2D materials and the possibility of acting as sensors167-170.
Photoelectric devices
2D materials are not only endowed with unique electrical properties but also show superior optical properties such as high transmittance, high stability and direct bandgap structure, thus exhibiting great prospects in the field of photoelectric devices. Wu et al. reported the synthesis of inch-level 2D GeSe2-layers by a simple annealing layer processing method, and the synthesis of high-quality GeSe2/GaN mixed dimensional vdW heterostructures by in situ growth mode171. Fig. 8a shows the optical photograph of the SiO2/Si and GeSe2/SiO2/Si wafers, and Fig. 8b shows the schematic and photographs of the GeSe2/GaN hetero-junction photodetector. The detector has an ultra-sensitive autonomous UV light response with UV rejection ratio of 1.8, large response of 261.7 mA W−1, high specific detectivity of 1.24 × 1014 Jones, and ultra-fast response speed of several nanosecond. More importantly, the GeSe2/GaN heterostructure device can sense the ultra-weak UV signal at 360 nm with the minimum detection limit of 180 pW cm−2 (Fig. 8c). Furthermore, this article implements an integrated photodiode arrays based on self-powered image sensors, showing the great promise of 2D GeSe2 for highly sensitive UV detection and imaging. In addition, in the far-infrared range, Wu et al. controled the vdW growth of wafer-scale 2D 1T′-MoTe2 layer with a simple heat-assisted telluride route, and the well-designed 1T′-MoTe2/Si vertical Schottky junction photodetector realizes the ultra-wide band detection range up to 10.6 μm and a large room temperature specific detectivity of more than 108 Jones in the MIR range172. Moreover, Wu et al. achieved a large-area synthesis of an integrated image sensor array with 2D MoTe2 layers, realizing non-cooled MIR imaging capabilities for displaying high resolution (Fig. 8d).
Fig. 8. Integrated photoelectric devices using large-scale 2D layered materials. a, Photographs of both SiO2/Si wafer and GeSe2/SiO2/Si wafer. b, |
Some researches also reported the micro-light-emitting-diode (μLED) devices with the adoption of 2D materials. For example, Hwangbo et al. showed that MoS2 film transistor (TFT) and μLED device monomer are integrated to produce active matrix μLED display173. Fig. 8e shows an optical image of μLED devices in a 4-inch GaN/silicon with MoS2 TFTs, and the inset is an integrated μLED arrays with a 2-inch GaN/sapphire wafer. On the basis of wafer-scale integrated devices, they achieved full-color μLED display by printing quantum dots on the blue micro. Fig. 8f shows the SEM images of the full-color display with quantum dots as the conversion layer. The display operated steadily without any optical cross-talk and presented three different colors: red, green and blue. The color coverage of the active matrix full-color μLED display screen reaches 110% of the specification of the National TV Standards Committee. Shin et al. reported vertical full-color μLEDs based on layer transfer technology with the adoption of 2D material, which achieved the highest array density (5100 pixels per inch) and the smallest size (4 μm) reported to date174. In addition, they have also demonstrated an active matrix display based on blue μLEDs integrated vertically with Si TFTs, as well as a 2D materials-based layer transfer (2DLT) techniques mass transfer process that could extend the utility of vertical μLEDs to large-scale displays. These studies will provide opportunities for integrated optoelectronic devices that need to incorporate 2D semiconductor materials.
Due to the effects of 2D materials, their heterostructures show broad prospects in the field of photosynapses and can be applied in biological nervous systems to obtain computational storage integration, perception and other learning capabilities. Zhang et al. prepared a centimeter-scale uniform photosensitive heterostructure device array via an interfacial co-assembly method. The author used the multilayer graphene plane heterostructure device. Fig. 8g shows the structural diagram and band diagram of the device with high detectivity of 3.1 × 1013 Jones, ultra-low energy consumption of 10−9 W, and broadband light sensing of 365 to 1550 nm. Furthermore, Fig. 8h shows that the device exhibits prominent photon synaptic behavior, with a paired-pulse facilitation index of 214% in terms of neural plasticity175. Moreover, by training the optical neural network architecture composed of heterostructural devices, handwritten digital recognition rate reached 85%, demonstrating the ability of the heterosynaptic array with information reinforcement learning and recognition. Except for the photoelectric characteristics, some researcheshave also investigated the thermoelectric176,177 and ferroelectric properties130,178,179 and made large-scale integrated devices. These typical integrated applications demonstrated the great potential of wafer-level 2D materials.
CONCLUSIONS
In summary, the wafer-scale synthesis strategies of representative 2D layered materials have been reviewed, and their applications in integrated electrical and photoelectric devices were also discussed. These progresses make the large scale production of 2D materials possible, however, considerable further development is needed to achieve industrialization. Therefore, further advancements are necessary to enhance 2D material characteristics and optimize the device fabrication processes. Despite notable progress in synthesizing 2D materials on a large scale has been achieved, exfoliated samples obtained through Scotch tape still remain preferable for fundamental researches that demand exceptional properties. Consequently, it is imperative to develop synthesis methods capable of producing defect-free and high-purity materials over large areas to enable practical applications. Additionally, it is imperative to regulate the nucleation density in future investigations for minimizing the presence of grain boundaries, as they constitute a pivotal factor influencing the electrical characteristics of materials. Notably, controlling the number of layers poses another significant challenge, with growth beyond two layers being particularly arduous due to the difficulty in regulating nucleation orientation. While wafer-scale synthesis of single crystal graphene has successfully achieved layer control, the synthesis of other 2D layered materials remains limited to monolayer single crystals. Consequently, in order to address these challenges, it is imperative to develop a comprehensive understanding of various aspects of substrates, including their surface structure, defects, thermal strain, and surface charge. Furthermore, it is essential to investigate a diverse range of growth substrates. In addition, there is a rich library of 2D layered materials, including conductors, semiconductors with different bandgaps and insulators. The extensive library of such materials provides a large potential for heterostructures with novel physical properties180. Vertical heterostructures have been rarely reported for their wafer-scale preparation, and these heterostructures still remain limited to the micron scale181. For instance, as the initial layer acts as a substrate for the growth of the subsequent layer, the characteristics of the underlying layer, such as grain boundaries, defects, and strain, profoundly influence various aspects of second-layer growth including precursor adsorption, nucleation, domain orientation, and lateral or vertical expansion. To tackle these challenges, it is imperative to acquire a more profound comprehension of the underlying mechanisms governing 2D materials growth, encompassing the intricate interplay between substrate properties and film formation. The atomically smooth surfaces can be used as substrates for the growth of 2D materials, such as graphene, TMDCs, and h-BN. However, due to the thermal expansion coefficient mismatch between 2D material and substrate, 2D materials will produce wrinkles. Recently, the preparation of fold-free wafer-scale single-crystal graphene at 750 °C has been reported182, however, whether this method is suitable for other 2D layered materials remains to be further investigated, and the growth temperature of this method also needs to be reduced.
Since the high temperature growth method is not suitable for current silicon-based IC technology, the material needs to be transferred from the growth substrate to the target substrate. However, the traditional transfer process can damage the grown films, such as the formation of wrinkles and cracks, which will increase phonon scattering and seriously affect the performance of devices. In addition, the polymer left on 2D materials during the transfer process increases the contact resistance of the device. Therefore, growing 2D wafer-scale materials directly on the target substrate is an effective way to avoid material damage and contamination. For industrial integrated device, the growth process including scalable techniques (roll-to-roll, batch-to-batch, etc.), production cost, repeatability, and wafer-scale uniformity are further considered. Furthermore, fast and reliable non-destructive characterization tools are urgently needed to evaluate the crystallinity and uniformity of wafer-scale 2D materials. With the adoption of the current advanced terahertz imaging technology, phase-shift interferometry technology and wide-field Raman imaging technology, the physical properties of 2D films can be analyzed, the acquisition time is as short as a few seconds per square millimeter, and the spatial resolution is as high as the order of micrometers183,184. Due to the extensive material library, there is a lot of room for undeveloped 2D materials and their vertical heterostructures. Since it is nearly impossible to explore all of these materials in experiments, AI-based material design may be useful for the industrialization and wafer-scale manufacture of these unexplored 2D materials.
MISCELLANEA
Acknowledgments This work was supported by National Natural Science Foundation of China (Nos. 91964203, 62274121, and 62104171), and Wuhan Science and Technology Major Program (No. 2022013702025186). R.C. also acknowledges support from the Young Elite Scientists Sponsorship Program by CAST (No. 2022QNRC001).
Declaration of competing interest The authors declare no competing interests.
