INTRODUCTION
In the post-Moore's Law era, while silicon-based transistors nearly reach their theoretical physical limits, the demand for high-performance and low-power electronic devices in the electronics industry continues to rise, which drives the need to find new-material. Two-dimensional (2D) transition metal dichalcogenides (TMDs). This is mainly ascribed to the advantageous characteristics of TMDs such as inert surface without dangling bonds, high carrier mobility at atomic thickness1,2, fast charge transfer3 and intrinsic spin-valley coupling4, making them emerge as the ideal candidate materials for the next generation of electronic and optoelectronic devices. Their inherently ultrathin thickness, relatively large effective mass and strongly robustness to quantum effects make them suitable for further scaling down to achieve high-density integrated circuits5-8. So far, mainstream researches have been focused on the potential application issue whether TMDs with satisfactory crystal quality, electronic properties, and large-scale uniformity could be synthesized at the wafer scale.
Within wafer-scale fabrication process, several challenges still remian to be addressed. One issue is how to precisely achieve orientation control of crystal growth. The growth of 2D TMDs is achieved by stitching domain with random orientation, which are often influenced by various factors such as substrate and atmospheric conditions. Currently, the common method for guiding crystal orientation of TMDs is to introduce certain crystallographic selective surface treatments9,10, whereas the preparation of the surface layer also requires highly precise control conditions. Another challenge is how to reduce the structural distortion in crystal. Due to atomic layer thickness of TMDs, defects are easily formed on the lattice during the process of growth, which leads to the large lattice mismatch and strongly hampers the synthesis of TMDs. This makes factors with precise control such as substrate selection, interfacial chemical reaction, mass transfer rate and temperature particularly important11. As a matter of fact, structural integrity is a trouble to be manipulated, environmental factors can easily interfere with the crystal growth direction, resulting in a variable growth condition rather than a suitable one12. Owing to its ultrathin characteristics, peeling, transfer and release will inevitably cause damage to the film like cracks, wrinkles, bubbles and residual polymers13. Additionally, to introduce 2D materials into the field of integrated circuits, not only wafer-scale fabrication, but also compatibility with traditional technology need to be taken into consideration. This requires the development of new structure and integration methods, which are compatible with traditional silicon-based transistors14. Therefore, some strategies have been developed to improve the crystal quality and uniformity of the films, such as substrate engineering15-18, defect control19, and interface engineering20-22.
Large-scale production of TMDs has been made possible through many techniques, including direct epitaxial growth and chemical conversion synthesis (Fig. 1a). In particular, chemical vapor deposition (CVD)23-28 has gained popularity due to its scalability29,30, controllability31,32 and cost-effectiveness. The fabrication of TMD film through chemical conversion synthesis involves two-step deposition and requires a highly controlled growth process. Top-down methods mainly include mechanical exfoliation and liquid-phase exfoliation (Fig. 1b), which can physically and chemically divide large crystals into thin flakes and then transfer them onto the target substrate surface, respectively. Recently, the largest TMD films have been fabricated using CVD, with MoS2 films up to 10cm in diameter. Bottom-up synthesis methods have been used to fabricate prototype devices in many fields, such as electronics and optoelectronics, with high-performance characteristics like high mobility and high on/off ratio. These devices include photodetectors, solar cells, light-emitting diodes and transistors.
Fig. 1. Wafer-scale fabrication techniques of TMDs. a, Bottom-up synthesis of wafer-scale TMDs using direct epitaxial growth (top) or chemical conversion (bottom). b, Top-down exfoliation strategies for the delamination of TMD bulk crystals through mechanical cleavage (top) and liquid-phase exfoliation (bottom). |
In this review, an up-to-date research progress was provided in the exciting field of wafer-scale TMDs, including both bottom-up and top-down methods, with a specific emphasis on their advanced synthesis and related characterization. In particular, the road to manipulate high quality of wafer-scale TMDs was highlighted and the insights into the future directions and challenges towards innovative application of functional electronic devices was also offered. Due to the enticing physical properties, the advancements in wafer-scale TMDs are bound to fully promote the integration of next-generation electronic devices.
Advanced bottom-up epitaxial growth
The high quality and uniformity of 2D semiconductors are the prerequisites for the large-scale production of integrated circuits, thereby advanced growth techniques should fulfill certain fundamental requirements, such as high uniformity, crystallinity, low grain boundary density as well as control of the number of layers, especially related to 2D materials, in which a variable performance was resulted from thickness fluctuations33. Although these requirements can be met by manipulating the substrate orientation towards bottom-up synthesis, the preparation of specific substrates remians a challenge. Inspired by the research on TMDs, wafer-scale fabrication has been promoted effectively, the strategies of CVD and chemical conversion will be fully discussed below.
Direct epitaxial growth
It has been recognized that chemical vapor deposition is the most effective, universal and reliable approach for the direct synthesis of TMDs monolayer at wafer scale34-36. Affected by poor domain stitching, the crystal quality of the produced films resulted in low electronic performance. To address these issues, a new route has been proposed, which implements the orientation-controlled growth to obtain single-crystal TMD films37-41. Due to the influence of the lattice structure of substrate on the films, high-quality single-crystal films can be obtained through perfectly matching the lattice of TMDs with proper substrate. This method, based on substrate lattice orientation control, is endowed with the following advantages: TMD films exhibit high crystallinity and a complete lattice structure. The occurrence of lattice defects and grain boundaries can be effectively reduced, resulting in a lower density of defects. It also allows for the control of lattice orientation, thereby manipulating the electronic properties of the film.
Wang et al.42 have reported a novel technique for layer-by-layer epitaxial growth of wafer-scale TMD materials, which utilizes the unique self-limiting mechanism followed by single-layer TMD thin films during the growth process so as to control the layer stacking38. Additional layers are not allowed to nucleate until the former layer growth is complete. Continuous high-quality films can be achieved through epitaxial growth through controlling the growth kinetics conditions (Fig. 2a). It is worth noting that when the number of layers increases gradually (N≥3), the surface proximity effect will rapidly decrease, nucleation and edge growth will become uncontrollable, which is crucial for achieving layer-by-layer epitaxy. For layer stacking, the crystal orientation of the initial substrate is a particularly important factor that should be taken into consideration. The (0001) surface of sapphire is one of the best substrates for MoS2 epitaxy to date since lattice mismatch can be ignored, and using step orientation can eliminate reverse domains. Epitaxy is driven by a dual-coupling guiding mechanism, in which the interaction between the film and substrate leads to the preferred orientation of domains as a pair of opposite domains. The step orientation interacts with the domain, which breaks the symmetry of the reverse parallel orientation43-46 (Fig. 2b), resulting in over 99% one-way alignment and seamless stitching effect. Therefore, the specific epitaxial relationship between the substrate and film is critical to achieving high-quality single crystals through epitaxial growth (Fig. 2c). Based on this principle, Wang et al.47 further proposed a growth mechanism for double-layer MoS2. Thermodynamic analysis showed that double-layer MoS2 can be achieved on the c-plane sapphire through designing atomic step height of the surface, which enables edge nucleation of double-layer MoS2, leading to the formation of the continuous centimeter-scale films. Overcoming the interfacial formation energy is necessary for edge nucleation (Fig. 2d), and the step height can supplement this part (Fig. 2e). The combined effect of edge nucleation and vdW interactions is responsible for large-scale epitaxy48-50. By aligning the orientation of TMD domains with the substrate steps, films can be easily grown at wafer-scale on the substrate (Fig. 2f). For instance, layer-by-layer epitaxy, where each completed thin film layer serves as the substrate for the next layer, ensuring good epitaxial quality of films with different layer numbers (Fig. 2g).
Fig. 2. Direct epitaxial growth via CVD. a, Schematic illustration of epitaxy process. Reprinted with permission from ref.42. © 2022 Oxford University Press. b, Step orientations on C/M (left) and C/A (right) sapphire (0001) wafers and the corresponding epitaxial MoS2 domain alignment43. c, Schematic of the epitaxial relationship of bilayer MoS2 on c-plane sapphire. d, Thermodynamic analysis on the monolayer versus bilayer MoS2 growth on c-plane sapphire. The inset shows a schematic of the bilayer MoS2 domain. e, The calculated step-height-dependent formation energy of MoS2 bilayers47. f, Photograph of the as-grown full-coverage WS2 monolayer on a two-inch sapphire wafer44. Reprinted with permission from refs.43-47. © 2021, 2022 Nature publishing group. g, AFM amplitude images taken from mono-, bi- and trilayer wafers (scale bar: 500 nm) and the corresponding cross-sectional HAADF-STEM images of epitaxial mono-, bi- and trilayer MoS2 (Scale bar: 3 nm). Reprinted with permission from ref.42. © 2022 Oxford University Press. |
Metal-organic chemical vapor deposition (MOCVD) has emerged as a reliable technology for the epitaxial growth of wafer-scale TMD materials51-58. This technique is particularly suitable for producing high-quality and wafer-scale thin films, it could also control thickness and structural accuracy at the atomic level. High-purity metal-organic compounds serve as precursors, their uniform supply to the entire substrate is achieved through vapor-phase transport. This precise control allows for the growth of most two-dimensional materials, especially TMDs, on any substrate at the wafer scale59. Kang et al.60 provided a direct approach for growing single-layer MoS2 and WS2 on SiO2 (Fig. 3a). By adjusting the partial pressures of each reactant throughout the entire growth process, nucleation density and integration stitching can be precisely controlled. This is a form of interfacial structure engineering that controls single-layer area coverage and crystallinity (Fig. 3b). Improvements in thin film crystallinity also depend on the substrate's surface properties. The step morphology of the substrate still remains an important strategy similar to the effect observed in CVD, which could induce the oriented growth of crystal domain61-65 (Fig. 3c and d). Under high nucleation density, crystal domains tend to grow as antiphase domains, thus reducing crystal quality. Step alignment is favorable for stabilizing nucleation and maintaining unidirectional growth of crystal domains, thereby reducing structural domain errors and promoting the transition of thin film to single crystal growth (Fig. 3e and f). Via MOCVD, wafer-scale TMD thin films up to 4 inch in size have been achieved (Fig. 3g). During the growth process, the substrate with non-specific orientation allows for random orientation growth with high-angle grain boundaries, continuous polycrystalline single-layers were formed with no visible gaps66 (Fig. 3h and i). The area of the bilayer is less than 0.5%, and the film's uniformity is excellent. After maintaining the step alignment, lateral growth became the preferred growth mode67,68 (Fig. 3j), making the realization of wafer-scale single-crystal single-layers possible. Hwangbo et al.69 directly grew MoS2 bilayer thin films on GaN chips to achieve one-step integration of LED wafers with backplane circuits (Fig. 3k). This hetero-integration method is compatible with the existing wafer-scale electronic system fabrication processes. TMDs like MoS2, allow direct epitaxial synthesis onto wafer-scale sizes at lower temperatures without hampering the LED active layer. Integration isolated from transfer indicates that this technique, which is compatible with existing wafer-scale fabrication systems, is promising to become the mainstream for future device fabrication.
Fig. 3. Direct epitaxial growth via MOCVD. a, Diagram of MOCVD growth setup. b, Coverage ratio for monolayer (green) and multi-layer (purple) regions as a function of growth time. Reprinted with permission from ref.60. © 2015 Nature publishing group. c-d, Schematic diagram of the top view of the domain growth on the step substrate in c and the step deformation at high temperature leads to the random nucleation of the domain in d61. e, Orientation histogram of 10 and 20 min samples confirms that WSe2 domain edges are primarily oriented at 0° and 60° with respect to steps on sapphire. f, Schematic illustrating 0° and 60° oriented WSe2 domains on sapphire (0001) surface62. Reprinted with permission from refs.61-62. © 2018, 2021 American Chemical Society. g, Photographs of monolayer MoS2 and WS2 films grown on 4-inch fused silica substrate. h, False-colour DF-TEM image showing a continuous monolayer MoS2 film. i, ADF-STEM image of a laterally stitched grain boundary in a monolayer MoS2 film. Scale bar: 1 nm. Reprinted with permission from ref.60. © 2015 Nature publishing group. j, AFM images of WSe2 grown on sapphire substrate after lateral growth stage. Reprinted with permission from ref.62. © 2018 American Chemical Society. k, TEM image of the MoS2 bilayer grown on the GaN wafer (left) and schematic illustration of a cross-section of the as-grown MoS2 on the GaN wafer (right). Scale bar: 2 nm. Reprinted with permission from ref.69. © 2022 Nature publishing group. |
Atomic layer deposition (ALD), which relies heavily on the deposition of precursors during atomic deposition cycle, is also an excellent method for depositing wafer-scale TMDs70-72. During an atomic deposition cycle based on chemisorption, the precursor is deposited on the substrate as it evaporates, followed by purging to remove redundancy, and again deposition proceeds again after reactants are introduced to participate in the reaction. The separation step is not only what distinguishes ALD from other deposition techniques, but is also the primary driver for the uniformity of deposition at the atomic scale. In addition, the self-limited deposition is an attractive feature of this technique. Limited by the absorption between substrate surface and precursors, the amount of deposition per cycle is less than that of adsorption, which ensures uniform layer-by-layer growth with the control of thickness under low temperature. Kim et al.73 have reported a route for synthesis of wafer-scale monolayer MoS2 in one ALD cycle. The temperature during the process of deposition was determined at 175 °C, which is beneficial for precise thickness control and overabsorption. Achieving overabsorption beyond self-limiting conditions is a prerequisite for ensuring the realization of wafer-scale monolayers. While grain orientation was under control, the growth of films was evolved to a high quality74. Mattinen et al.75 demonstrated the deposition of polycrystalline, wafer-scale MoS2, TiS2, and WS2 films at low temperature down to 100 °C. Factors enabling the low temperature mainly include using H2S-based plasma feed gas and providing sufficient H2 together with H2S. TMDs materials deposited under such low temperature processes can be used as channel materials for FETs76, and are compatible with temperature-sensitive device scenarios like flexible electronics. The potential as building blocks for the existing wafer-scale logic systems has also been confirmed77.
Chemical conversion
Currently, the mainstream approach to obtain wafer-scale 2D semiconductors is bottom-up methods. Limited by the poor controllability of synthesis process, the electronic properties of film are subjected to a decrease. In order to provide high-quality and controllability of thickness, a chemical conversion method has emerged78-82. Chemical conversion typically involves two steps: precursor deposition and precursor conversion. Firstly, the precursor thin film is deposited onto the substrate, followed by a direct chemical reaction, subsequently, it is converted into a TMD film. In contrast to CVD, the quality of 2D TMD films is primarily controlled by the quality of the precursor film. Surface saturation reactions are used to implement single-component conversion, which is less sensitive to changes in temperature and reactant flux. This method also avoids the interaction and phase separation of multiple materials, resulting in the formation of films with high in-plane uniformity and stability. In addition, the pre-deposition coating can be performed on complex-shaped substrates and particulate materials, which greatly increases the scalability of the technique.
Lin et al.83 developed a universal chemical conversion synthesis method to grow high-quality, environment-stable and wafer-scale transition metal chalcogenides (TMCs) films with controllable thickness. In their approach, a metal film was deposited onto a heated sapphire substrate under a H2O- and O2-free atmosphere with the adoption of magnetron sputtering rather than traditional electron-beam or thermal evaporation onto the wafer substrate. The crystalline metal layer was subsequently converted into 2D TMCs via a CVD process. For example, NbSe2 films were synthesized by appropriately selenizing the pre-deposited Nb film structure on the substrate. The resulting films exhibited robust superconductivity and charge density waves, as well as excellent stability under harsh treatment and destructive encapsulation. The performance was comparable to exfoliated flakes from bulk materials, but strict control of the growth process is required, especially for the second step of selenization. Excessive selenization will cause Se to condense into nanoscale particles on the surface of NbSe2 films. The environmental stability of the films is attributed to the absence of oxygen throughout the entire growth process, which prevents the formation of atomic vacancies and oxygen bonds. These defects could weaken the structural stability and intrinsic properties, such as superconductivity of the TMC films.
Furthermore, Xu et al.84 reported a process for the synthesis of single-crystal 2H MoTe2 on a wafer scale. Single crystal 2H MoTe2 was implanted in pre-deposited 1T’ MoTe2 thin film, serving as a seed to trigger phase transition and recrystallization, and then extended outward by tellurization (Fig. 4a). Tellurization plays a critical role in the chemical conversion synthesis of MoTe2 films85,86 (Fig. 4b and c), where the 2H phase is the preferred phase at low temperature and its crystal quality is limited by the tellurization rate and time87,88. Direct synthesis of the 2H phase is affected by the presence of translation boundaries61,89,90. The use of polycrystalline 1T’ MoTe2 during the solid-to-solid phase transformation process ensures better crystallization. Crystal orientation is expanded for single-crystal 2H MoTe2 on the wafers (Fig. 4d and e). Given that tellurization can also induce the transformation of the 1T’ phase, the deposition of Al2O3 on its surface is necessary, which is mainly ascribed to the fact that the effect of limiting random orientations in the 1T’ phase works through this structure. Also, this ensures that the stacking sequence and crystal orientation of the seed and bottom film are consistent (Fig. 4f and g). It is worth noting that, a vertical 2H/1T’ MoTe2 structure could be formed by using single-crystal 2H MoTe2 as a substrate for pre-deposited Mo films, followed by tellurization to transform them into 1T’ MoTe2. The 1T’ phase quickly undergoes orientation migration and rearrangement with the lattice structure of the 2H phase acting as the substrate, and repeating this step can achieve rapid vertical epitaxy on the wafer scale with thickness control. For single-chip integration technology, the stability of TMD films tends to be crucial for device reliability. Films prepared by chemical conversion method exhibit large-scale uniformity, nearly constant thickness and roughness, and perfect crystal structure (Fig. 4h). It also demonstrates the excellent structural stability, without atomic vacancies in the lattice, whether exposed to air for several days or heated for 50 h at 50 °C (Fig. 4i).
Fig. 4. Chemical conversion. a, Schematic diagrams for the in-plane 2D-epitaxy synthesis of wafer-scale single-crystalline 2H MoTe2 thin film. Reprinted with permission from ref.84. © 2021 American Association for the Advancement of Science. b, An alloy phase diagram of MoTe2. c, A polymorphic sputtered MoTe2 phase diagram as a function of solid-phase crystallization temperature and dwell time. Reprinted with permission from ref.91. © 2022 Nature publishing group. d, Optical image of the 1 inch single-crystalline MoTe2 wafer. e, The in-plane transverse IPF map of a large area far away from the seed. f-g, Cross-sectional HAADF-STEM image and zoomed-in image of the seed region. Reprinted with permission from ref.84. © 2021 American Association for the Advancement of Science. h, Atomic structure image with the inset showing the atomic model of NbSe2 (top view) with 2Hc structure after exposure to air for several days. Scale bar: 2 nm. i, STEM images at different magnifications showing the atomic structure of the NbSe2 film after heat treatment at 50 °C for 5 h in air. Scale bar: 2 nm. Reprinted with permission from ref.83. © 2019 Nature publishing group. |
Kim et al.92 also evenly dispersed liquid gallium on the substrate surface by a scraper. The surface oxide was then converted to gallium chloride in hydrochloric acid vapor, followed by sulfurization in low-temperature sulfur gas to guide the synthesis of the 2D semiconductor layer. The entire conversion process was carried out at low temperatures (below 300 °C). It didn't deploy the expensive high-temperature technique, and can be easily compatible with the existing standard synthesis routes, also allowing for low-cost mass production. The electronic performance of the thin films is still inferior to those prepared using CVD and MOCVD, this is partly ascribed to the fact that the film is only continuous within a range of 10 µm.
Wang et al.93 reported the growth of large-area and high-quality monolayer MoSe2 based on vapor-liquid-solid (VLS) mechanism, that ultrafast growth of MoSe2 was achieved through the behavior of molten droplet precursor formation to supersaturated precipitation of solid products. Salt was used to lower the reaction potential barrier and promote the growth of monolayer TMDs94. Crystal growth benefits from the synergistic effect of one-dimensional VLS growth and two-dimensional VS edge nucleation, with the nucleation density controlled by the number of droplet seeds during growth. The nucleation behavior of this growth mode has been revealed for enhanced control of the quality and crystallographic orientation. This approach can also be used in the growth of nanowires, nanotubes and nanoribbons, which also shows potential for implementation in nanoelectronics95.
The two-step deposition method is a promising approach for the production of high-quality TMD thin films. By growing single crystals on arbitrary substrates91,96-99, this method ensures uniform coverage of holes with high width/depth ratio, which meets the criteria of complex structures such as 3D NAND. It also guarantees good step coverage and pattern fidelity. There is no doubt that controlling the conversion rate in the second step is particularly crucial for this method100-104, which requires temperature and vapor concentration of reactants to be within a reasonable range. Although the quality of film depends on the quality of pre-deposition precursor film, diffusion limitations and conversion efficiency on the substrate still cause the formation of numerous grain boundaries or irregular morphology. This hinders the electrical performance of devices. Currently, more researches are needed to address the specific conversion mechanisms for different types of material films in chemical conversion method. Further optimization of process conditions and parameters is therefore necessary.
Top-down exfoliation
In contrast to bottom-up approaches, top-down approaches, which physically transform bulk materials into 2D materials, are also effective methods to obtain high-quality wafer-scale TMD films. Mechanical exfoliation, which peels off layers from bulk TMDs to obtain thin films, offers advantages such as suitability for processing large amounts of materials without any chemical reagents or special conditions, and as-prepared films typically exhibit high quality and larger size. Exfoliation process is prone to introduce stress, and hampers the structure of atomic-level thin film, which shows a high requirement of operation. Liquid phase exfoliation relies on chemical reagents to exfoliate bulk TMD crystals into ink, then transfers them onto a target substrate through specific means of transfer. This exhibits higher efficiency and the potential of larger size compared with mechanical exfoliation. Inevitably, contamination enters the surface of materials. These drawbacks have driven recent research focus in this area to address these challenges and further advance the development of this field.
Mechanical cleavage
The unique layered geometry and weak interlayer interactions of TMDs make mechanical exfoliation a low-cost method for producing single and few-layer materials. The advantage lies in the preservation of crystal structure and high crystallinity of the bulk crystal, which is suitable for preparing large-size and high-quality films. Special equipment and complex operation process are not required. For example, traditional tape exfoliation is a feasible method of exfoliation, but it is also of several disadvantages such as being time-consuming, limited in yield, restricted by the size and shape of the source crystal, or difficult to produce with regular shapes and large areas. It is also prone to cause contamination and defects in the films, so it remains a challenge to produce and apply TMD films at a wafer scale. Noted that, recent studies105-107 have shown that the non-covalent interaction of covalent-like quasi-bonding (CLQB) can firmly bond 2D crystals with substrate without affecting their structure and properties. In this case, the enhanced adhesion between the crystal and the substrate is regarded as a starting point for effective exfoliation. The determination of substrate becomes crucial, and noble metals conform to these criteria.
Recently, Shim et al.108 demonstrated a layer-by-layer exfoliation technique (Fig. 5a) for producing various 2D materials into wafer-scale thin films, including WS2, WSe2, MoS2 and MoSe2. Based on the difference in interfacial toughness (Γ) between different material contact surfaces, this technique is deployed to exfoliate the wafer-scale multilayer materials to obtain single-atom-thick precision one. Ni as an exfoliating medium was used to mechanically exfoliate. Firstly, a Ni film was deposited on the top layer of the wafer-scale 2D material, and then covered with tape to form a stack of tape/Ni/2D material, which served as the requirement for layer-by-layer exfoliation. Since the Ni metal layer acted as an atomic-level adhesive to bond with the 2D material, it exhibited a stronger interface binding energy than the van der Waals (vdW) bonding between the 2D material layers (Fig. 5b). When external force was applied, the bending moment generated would cause a small amount of torsion within the material, which provides elastic strain energy to the bottom interface from the top layer. And the strain energy between different interfaces was not the same (Fig. 5c). When the desired strain release rate was reached, the strain energy per unit area would be released during layering. This would cause cracks to form and spread during the strain release process, thus leading to a peeling-type fracture and achieving the desired material layering effect. The resulting single-layer material produced by exfoliation can reach wafer scale (Fig. 5d). 2D materials grown at the edge of the wafer often have defects, which also promotes crack propagation. Interestingly, for multilayer materials, the top layers often exhibit irregular and discontinuous, while the lower layers remain continuous and uniform. This is obviously suitable for repeated exfoliation through using exfoliation media.
Fig. 5. Metal-assisted mechanical cleavage. a, Schematic illustration explaining the Ni-assisted exfoliation process for 2D-ML material. ML, monolayer. b, Schematics of crack progression during Ni-assisted exfoliation process for initial exfoliation of entire 2D materials from sapphire. c, Modeling of energy release rate according to applied moment. d, Modeling of energy release rate according to applied moment108. e, Schematic of the layer-by-layer exfoliation technique to yield even and odd layers from an AB-stacked vdW crystal109. Reprinted with permission from refs.108-109. © 2018, 2020 American Association for the Advancement of Science. f, Schematic diagram of the Au-assisted exfoliation process of ML MoS2. Reprinted with permission from ref.110. © 2020 Nature publishing group. g, Optical images of six monolayer samples on SiO2/Si substrate sequentially exfoliated from a centimeter-size WSe2 single crystal shown at the upper left corner. Reprinted with permission from ref.109. © 2020 American Association for the Advancement of Science. |
Additionally, there have been reports111-113 showing that Au also exhibits the potential for high-yield exfoliation of many 2D TMD materials. The Au metal layer exhibited low chemical reactivity and high air stability, and provided much greater vdW adhesion than traditional tape-based exfoliation. The mechanical softness of Au enabled a smoother and more uniform acquisition of thin film to be obtained, higher quality of exfoliation was achieved when using it as an exfoliation medium. It could also effectively improve interface contact distortion caused by stress during exfoliation and facilitate non-destructive layer-by-layer exfoliation easier (Fig. 5e), repeatedly producing complete single-crystal monolayers109,114,115. Based on this, Huang et al.110 reported a universal gold-assisted exfoliation method (Fig. 5f), which enabled the production of large-area 2D materials, including MoS2, MoSe2, MoTe2, WS2, WSe2, WTe2, TiS2, TiSe2, IrTe2, SnS2, SnSe2, NbSe2, NbTe2, VSe2, TaS2, TaSe2, PtSe2, PtTe2, PdTe2, and other single layers. Au was first deposited on a substrate covered with Ti or Cr adhesive layers, then block crystals were cracked and contacted with the Au layer, with tape on the outermost layer to form a stacked structure of tape/2D material/Au. The tape removed most of the crystal, leaving a macroscopic large-area single-layer thin film on the gold surface (Fig. 5f). This exfoliation method also achieved centimeter-scale single-crystal single-layers, each layer size reached the same one, but was limited by the size of the block crystals (Fig. 5g). Metal layer was removed by etching. Interestingly, the conductivity of Au/Ti films could be controlled by adjusting the thickness, making it possible to directly measure the optical properties and fabricate devices after exfoliation.
In conclusion, mechanical exfoliation is evolving towards the preparation of wafer-scale films that are only limited by the size and crystallinity of the source crystals. While metal-assisted mechanical exfoliation offers clear advantages in the quality of wafer-scale TMD films produced, the weak interactions between materials and substrates still contribute to poor exfoliation performance. Therefore, the need for more appropriate exfoliation processes or more rational exfoliation media are highlighted, and serves as the breakthrough for this type of technology. Given that the demand for material production and size is increasing, this fabrication technology has not yet become the mainstream method for preparing wafer-scale films. To further achieve industrial-scale fabrication and application, the technology needs to ultimately follow the path of as old and well-established as the extraction of silicon wafers from single crystals.
Liquid-phase exfoliation
Due to the weak vdW forces between layers in 2D materials, liquid-phase exfoliation (LPE) has become another important technique for obtaining wafer-scale thin films. Inexpensive chemical reagents are used as the exfoliating medium without the requirement of expensive and precise equipment. With simple operating steps, LPE is easier to be conducted than mechanical exfoliation. The resulting thin flakes can be transferred to various substrate, facilitating flexible integration. The quality of the exfoliated flakes is relatively high, with a relatively flat surface that is less prone to be damaged. One common way for exfoliating layered crystals is through lithium-ion intercalation116-124. Due to the insertion of lithium ions into the crystal through electron implantation, phase transition will be induced. Previous studies125-127 have shown that the amount of electron implantation determines whether this phenomenon will occur or not, and replacing small lithium ions with larger cations, such as quaternary ammonium ions, is a reasonable route to mitigate it.
Lin et al.130 reported a universal method for preparing highly uniform, solution-processable, and phase-pure semiconductor nanosheets. Quaternary ammonium molecules were adopted as intercalation agents to be inserted into the layers of MoS2 crystals via electronic chemical exfoliation, and the layers were separated after mild ultrasonic treatment (Fig. 6a). This method can be used to prepare most TMD materials, including128 Nb(Se/Te)2, Ta(S/Se)2, Ti(S/Se)2, and MoTe2 (Fig. 6b). The entire exfoliation process is precise and controllable, and the original crystal quality and clean van der Waals interfaces were maintained by the resulting nanosheets. Unlike traditional liquid-phase exfoliation, in which several micrometer-sized blocky crystals were selected for exfoliation, the resulting solution of pure nanosheets ensures good uniformity (Fig. 6c). To obtain wafer-scale thin films, TMD materials were cleaved into nanosheet ink and deposited onto substrates using various techniques, including drop casting131, spin and spray coating132, screen printing92, flexographic129 and inkjet printing133,134. Spin coating is often used to produce high-quality and ultra-thin films (Fig. 6d), while inkjet printing is endowed with the advantages of precise deposition and is often used for patterned thin films (Fig. 6e). With stable ink solutions, larger area films can be prepared on different substrates, especially flexible substrates (Fig. 6f). Alternatively, ink solutions can be coated onto substrates using an industrial roll-to-roll process135,136. The quality of the thin films strongly depends not only on the processing itself but also on the quality of the ink (Fig. 6g and h). Recently, screen printing has been introduced into the CVD synthesis method to produce wafer-scale thin films92. This provides necessary conditions and broad prospects for low-cost mass production of flexible electronic products. Although the quality and electronic performance do not match those of TMD thin films produced by CVD and MOCVD methods137, they offer potential for various applications.
Fig. 6. Liquid-phase exfoliation and printing techniques. a, Schematic illustration of the liquid exfoliation process of bulk MoS2 crystal by electrochemical intercalation116. b, Photographs of a series of TBA-exfoliated 2D superconductors dispersed in propylene carbonate solvent128. c, Atomic force microscopy images of graphene, MoS2, black phosphorus and BN 2D nanosheets118. Reprinted with permission from refs.116-128. © 2019, 2021, 2000 Nature publishing group. d, Spin coating. e, Ink-jet printing. Reprinted with permission from ref.129. © 2016 Wiley-Blackwell. f, Photograph of the MoS2 thin film deposited on a standard 100 mm-diameter SiO2/Si wafer. g, AFM analysis of MoS2 films fabricated on substrate. h, Cross-sectional TEM images of plane-to-plane contacts between MoS2 nanosheets. The red dashed boxes indicate the regions where two nanosheets exhibit a contact that is nearly indistinguishable from a van der Waals interface between atomic layers of MoS2 Reprinted with permission from ref.130. © 2018 Nature publishing group. |
Despite its limitations, the LPE method is still an extremely promising approach owing to its excellent scalability and low cost. Particularly, it is suitable for the fabrication of flexible devices, sensors and wearable devices. So far, most of the semiconductor nanosheets and their thin films produced with this method exhibit significantly lower electrical performance compared with those prepared by mechanical exfoliation or CVD. This is attributed to the inevitable surface contamination and structural defects, such as phase impurities or large densities of dislocations. To address these issues, the use of high-purity solvents and surfactants is considered as a feasible approach. Another approach is to combine the solution-based processing method with other techniques, such as annealing or layer-by-layer assembly after coating on substrates, both of which can effectively improve the quality of the final electronic properties of the thin films.
It is worth noting that films peeled by using thermal releasing tape (TRT) are superior in terms of integrity to water-assisted peeling, which requires the sample to be in contact with water, thus causing irreversible contamination and damage to the film. Obviously, the latter is more practical in terms of mass production, peeling efficiency and product size138.
Wafer scale devices based on 2D TMD materials
The performance of electronic devices is strongly influenced by the fabricated strategies of TMDs. Due to different production methods, the variations in crystal structure, lattice distortion, defect density, thickness and surface roughness can have a direct impact on the performance of TMD transistors. In Table 1, remarkable research works and the transistor performance achieved by wafer-scale fabrication processes are summarized. CVD is suitable for high-performance device fabrication because of the low defect density and high surface uniformity for the films, transistors exhibit high carrier mobility and high on/off ratio. Chemical conversion methods can achieve high-quality crystallization at low temperatures, but the widespread distribution of defects result in relatively lower carrier mobility and on/off ratio. They can be produced by mechanical exfoliation with high quality and crystallinity, whereas their irregular shape and small size are not suitable for large-area devices. Liquid-phase exfoliation produces thin films with high crystalline integrity, inevitably, defects or contamination generated during the exfoliation process led to poorer performance. In addition to differences in fabricated strategies affecting FET performance, traditional planar FETs are limited by quantum confinement effects. A possible way to alleviate this problem is to integrate TMDs with the existing silicon technology.
Table 1. Summary of performance of FET achieved by wafer-scale fabrication strategies. |
| Strategy | Materials | Size | Channel length (µm) | Contact metal | ON/OFF ratio & Mobility (cm2 V−1s−1) | Dielectric layer | Refs. |
|---|---|---|---|---|---|---|---|
| CVD | MoS2 | 6(in.) | 1 | Au/Ti 10/50 nm | 105-106 6.3-11.4 | - | 34 |
| MoS2 | 4(in.) | 10 | Au/Ti/Au 2/2/30 nm | 109 70 | - | 36 | |
| MoS2 | 2(in.) | 30-60 | Ti/Au 2/30 nm | 106 40 | - | 38 | |
| MoS2 | 4(in.) | 5-50(tri-) | Ti/Au/Ti 1/5/1 nm | > 107(tri-) 80(mono-)/110(bi-)/145(tri-) | 10 nm HfO2 | 42 | |
| MoS2 | 2(in.) | 50 | Au 80 nm | 109 102.6 | 30 nm Al2O3 | 43 | |
| MoS2 | 2(cm.) | 8 | bismuth/ Au 20/30 nm | > 107 122.6 | 25 nm Al2O3 | 47 | |
| MOCVD | MoS2 | 2(in.) | 10 | Ti/Au 2/90 nm | - 21.6 | - | 53 |
| WS2 | 2(in.) | 1 | Ni/Au 40/30 nm | ∼107 16 | 50 nm Al2O3 | 61 | |
| MoS2 | 4(in.) | 10 | Cr/Au 3/50 nm | 109 12.3 | 30 nm Al2O3 | 69 | |
| Telluride | MoTe2 | 1(in.) | 10 | Pd/Au 10/50 nm | 1.5 × 104 45 | - | 84 |
| Ni-assisted exfoliation | WS2 | 2(in.) | 4 | Ti/Au 5/30 nm | > 107 89.5 | 50 nm Al2O3 | 108 |
| Au-assisted exfoliation | MoS2 | (cm.) | - | Au/Ti: 2/2 nm | > 106 22.1-32.7 | - | 110 |
| Electrochemical intercalation | MoS2 | 4(in.) | - | Ti/Au 30/50 nm | ∼106 7-11 | 30 nm Al2O3 | 130 |
Aside from the differences in synthesis methods leading to variations in FET performance, the impact of the quantum limit effect on FET performance should also be taken into consideration when using traditional planar FETs. One way to alleviate this problem is by incorporating TMDs into the existing silicon technology139-144. Tong et al.145 have recently reported a novel type of complementary field-effect transistor (CFET) that utilized silicon-on-insulator (SOI) and MoS2 as the channels for p-type FETs (pFETs) and n-type FETs (nFETs), respectively. The SOI wafer had a pre-set pFET array (Fig. 7a). By transferring the MoS2 from the sapphire substrate to the SOI wafer (Fig. 7b), a 3D stacking structure was formed, with the top MoS2 used as the n-channel. The entire transfer process was carried out at low temperature to minimize the degradation of the bottom silicon device. Additionally, this low-temperature transfer process is fully compatible with the backend process in CMOS technology flow (Fig. 7c). Compared with traditional silicon CMOS, where pFET width is typically twice that of nFET, the CFET in the 3D stacking SOI-MoS2 architecture exhibits a uniform width for both pFET and nFET, enabling better nFET/pFET balance in achieving the trade-off between drive capability and leakage current. This contributes to a significant increase in integration density while reducing device area. The CFET in this architecture (Fig. 7d) exhibits excellent performance, and the corresponding silicon hybrid integration method can be used to develop new functional devices with high integration efficiency and low processing difficulty. It is worthy to be noted that pFETs exhibit certain compatibility with the existing CMOS fabrication processes, though there are still challenges remaining to be addressed146. The realization of optimal p-type performance necessitates additional doping and oxidation steps, which contributes to advantageous features such as higher on/off current ratios and lower power consumption. Nonetheless, lattice and interface defects may also be introduced by these steps, which could potentially degrade the device performance. Nevertheless, pFETs hold promise as perspective candidates for integration into CMOS devices.
Fig. 7. Application scenarios for functional integrated circuits. a-b, Optical images of the SOI (a) and MoS2 (b) four-inch wafers. c, Wafer-scale process to transfer MoS2 on top of the SOI substrate. d, Optical image of the 3D-stacked CFET wafer after MoS2 transfer and the zoom-in image of the CFET device145. e, Schematic of a FET with ML-Fin-array and the other gray SEM images of MoS2 Fin arrays with different fin spacings and channel lengths147. f, Schematics of large-area vdW integration approach by adapting a contact mask-aligner. g, Optical microscope image of a monolayer MoS2-based half-adder148. h, Optical images of logic circuits from solution-processible MoS2 thin-film transistors130. i, Schematic diagram of 3D memristor array with buried metal interconnects and logic circuits116. Reprinted with permission from refs.116, 130, 145, 147, 148. © 2018, 2020, 2022, 2023 Nature publishing group. |
Another approach is the utilization of monolayer TMDs for constructing integrated arrays149-153 or implementing a vertical conduction architecture154,155 to achieve desirable device scaling. Chen et al.147 developed a template growth method that enabled the fabrication of fin-shaped field-effect transistors (FinFETs) with atomically thin TMD materials as fins. The fins were grown via CVD, and the resulting TMD ML-FinFET exhibited excellent conductivity performance, with an on/off ratio of around 107. Additionally, a TMD fin-array ML-FinFET was fabricated using this process (Fig. 7e), representing a significant step towards FinFETs' approaching the physical limit of atomic layer thickness, which is one order of magnitude smaller than that of the most advanced devices. While low carrier mobility remains a major challenge to its widespread application, this transistor structure holds promise for future nanoelectronics applications that require atomic-scale precision. Yang et al.148 demonstrated an efficient large-area vdW integration process for scalable fabrication of high-performance transistors and logic circuits on 2-inch single-layer MoS2 wafers grown by CVD. This process involved effective control of vdW forces to peel and transfer the electrode array, with a quartz/polydimethylsiloxane semi-rigid stamp used as the peeling and transfer medium. A standard photolithography mask aligner was adjusted for electrode array alignment (Fig. 7f). Uniform mechanical force for the critical interface adhesion/separation was provided, thus achieving a bubble-free and wrinkle-free interface, which is crucial for robust vdW integration over large areas. FETs manufactured by the vdW integration method were further utilized to create various logic gates and circuits, including a half-adder (Fig. 7g). These studies demonstrate the scalable vdW integration of 2D transistors and logic circuits on CVD-grown MoS2 over large areas.
Notably, various solution-based methods also show significant advantages in device fabrication, including room temperature processing, substrate flexibility, low-cost production and scalability of wafer scale. Therefore, TMD thin-film transistors fabricated by solution-based methods also exhibit excellent electronic performance. Lin et al.130 reported a scalable fabrication process based on large-area thin film transistor arrays. The mobility achieved in the solution-processed films was comparable to that achieved in individual MoS2 nanosheets, making it possible to construct logic circuits (Fig. 7h), which can almost meet the organization of any digital integrated circuit. This suggests that the adoption of solution-processed TMD inks for device applications is also a powerful approach for achieving large-scale, high-performance and scalable manufacturing of transistors156. Compared with CVD-grown films that are stacked after transfer, solution processing avoids issues such as film cracking, surface wrinkles, and polymer residue contamination, which are conducive to maintaining the stability of electronic devices. Because of this, solution processing has become an ideal platform for 2D material integration in monolithic 3D integration (M3D). Tang et al.116 employed solution-based methods to fabricate 3D stacked MoS2 resistive random-access memory (RRAM), and utilized solution-processed 2D MoS2 films as the active switching layer in the vertical stacking memory architecture, which was alternately distributed with metal electrodes in the vertical direction (Fig. 7i), thus achieving high-performance memory integration. This M3D integrated architecture was implemented with mature industrial technologies to ensure compatibility with the existing 3D IC processes. Its application for high-density devices not only provides a promising avenue for traditional integration bottlenecks, but also provides strong support for the development of new generations of electronic devices157.
CONCLUSIONS AND OUTLOOK
In the post-Moore's law era, the limitations in silicon-based integrated circuit technology have driven the emergence of new approaches, including the integration of advanced materials with traditional silicon-based processes or the complete replacement of silicon with new materials. So far, two-dimensional materials, represented by TMDs, have emerged as one of the most promising candidates for the next generation of electronic and optoelectronic devices in era beyond Moore's law. Despite the fact that the size of as-prepared thin films has begun to catch up with that of traditional silicon, the production with large-scale and high-quality still remains a core bottleneck for industrial applications, also there is a long way to go in terms of the quality and electronic performance, particularly in the production of wafer-scale films, where many problems and challenges still exist and need to be addressed.
(1) Currently, the range of materials that can be manufactured using wafer-scale production is limited, with only a few materials such as MoS2 and WS2 being commonly used.
(2) Control over the number of layers remains a significant challenge, and controlling the growth of more than two layers is particularly difficult due to issues with random nucleation.
(3) The adoption of growth methods to produce wafer-scale heterostructures is still in its infancy. The process requires precise control over factors such as the twist angle and lattice matching between layers, and therefore, the current scale of production is limited to laboratory conditions, and the control parameters are not yet well understood.
(4) Further exploration is required to fully understand the core theory of controlling the orientation of substrate, which serves as the foundation for obtaining single crystals.
(5) The relationship between quality and performance is influenced by multiple factors, including the number of layers, crystal orientation, impurities, and so on. Therefore, there is currently no standardized approach to evaluate these materials.
(6) Achieving reproducibility in large-scale production is critical, and it requires precise process parameter control and optimization, as well as the development of robust testing and evaluation methods.
(7) Integration with existing silicon-based technologies remains an active area of research, as there are several challenges need to be taken into consideration, such as differences in lattice constants, thermal expansion coefficients between mature and standardized silicon-based IC manufacturing processes, and the different interface stresses between silicon-based materials and TMD materials.
It should be noted that the atomically thin nature of 2D materials enables easy vertical stacking, which presents a potential replacement for silicon. To achieve high-performance transistors driven by industry, devices with high-density integrated circuits and robustness are required. 2D materials, especially TMDs, hold promise due to their excellent performance and scalability. One important consideration in the fabrication of wafer-scale 2D materials is the temperature requirement. Bottom-up methods typically involve high temperatures ranging from 200 to 1000 °C, while top-down methods, including film peeling and transfer, can be performed at lower temperatures below 200 °C. This low-temperature transfer process allows for the seamless integration of TMDs with existing silicon-based devices, as it causes minimal damage to the underlying silicon substrate. Furthermore, this low-temperature transfer technique is fully compatible with the back-end processes in traditional CMOS fabrication. Consequently, it holds great potential for realizing the integration of TMDs into very-large-scale integrated circuits (VLSI). Intel has recently announced the use of a stacking architecture to ensure compatibility with transmission integration and size reduction, where heterogeneous stacking with 2D materials can be the most effective. While the novel physical properties of 2D materials offer a new avenue for continuing Moore's law, extensive researches should be conducted to reveal the relationship between the structure and properties of wafer-scale TMD films, which will unlock their potential for realizing innovative new concept devices.
MISCELLANEA
Acknowledgments This work was supported by Hunan Provincial Natural Science Foundation of China (grant No. 2022JJ20085) and Changsha Natural Science Foundation (grant No. kq2202092). This research did not receive any specific grant from funding agencies in the public, commercial, or not-for-profit sectors.
Declaration of Competing Interest The authors declare no competing interests.
