Cross-Clock Domain Verification Practice of NASPIC Communication Module Based on FPGA
XIAO Anhong,ZENG Hui,QIN Youyong,JIN Jin,ZHOU Junyi,GUO Wen,CHEN Junjie
Journal of Shanghai Jiaotong University . 2019, (Sup.1): 84 -87 .  DOI: 10.16183/j.cnki.jsjtu.2019.S1.015