TMAC: Training-Targeted Mapping and Architecture Co-Exploration for Wafer-Scale Chips

HUIZHENG WANG, QIZE YANG, TAIQUAN WEI, XINGMAO YU, CHENGRAN LI, JIAHAO FANG, GUANGYANG LU, XU DAI, LIANG LIU, SHENFEI JIANG, YANG HU, SHOUYI YIN, SHAOJUN WEI

Integrated Circuits and Systems ›› 2024, Vol. 1 ›› Issue (4) : 178-195.

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Integrated Circuits and Systems ›› 2024, Vol. 1 ›› Issue (4) : 178-195. DOI: 10.23919/ICS.2024.3515003
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TMAC: Training-Targeted Mapping and Architecture Co-Exploration for Wafer-Scale Chips

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2024, 1(4): 178-195 https://doi.org/10.23919/ICS.2024.3515003

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