Simulation Framework and Design Exploration of in-Situ Error Correction for Multi-Bit Computation-in-Memory Circuits

TING-AN LIN, TOURANGBAM HARISHORE SINGH, PO-TSANG HUANG

Integrated Circuits and Systems ›› 2025, Vol. 2 ›› Issue (4) : 243-254.

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Integrated Circuits and Systems ›› 2025, Vol. 2 ›› Issue (4) : 243-254. DOI: 10.23919/ICS.2025.3612817
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Simulation Framework and Design Exploration of in-Situ Error Correction for Multi-Bit Computation-in-Memory Circuits

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{{article.zuoZheEn_L}}. {{article.title_en}}[J]. {{journal.qiKanMingCheng_EN}}, 2025, 2(4): 243-254 https://doi.org/10.23919/ICS.2025.3612817

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