Original article

Understanding Synthesizable Design Methodologies for Mixed-Signal SAR ADC Circuits

  • FENG YANG 1 ,
  • DUY-HIEU BUI 2 ,
  • YANG ZHAO 1 ,
  • LIANG QI 1 ,
  • JINGHUA ZHANG 3 ,
  • XUAN-TU TRAN 2 ,
  • YONGFU LI , 1
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  • 1 Department of Micro-Nano Electronics and MoE Key Lab of Artificial Intelligence, Shanghai Jiao Tong University, Shanghai 200240, China
  • 2 VNU Information Technology Institute -Vietnam National University, Hanoi 100000, Vietnam
  • 3 Xinyi Information Technology, Nanjing 221400, China
+ CORRESPONDING AUTHOR: YONGFU LI(e-mail: ).

Received date: 2024-09-26

  Revised date: 2024-10-10

  Accepted date: 2024-10-14

  Online published: 2025-01-09

Supported by

the National Natural Science Foundation of China under Grant 62434006 and Grant(62350610271)

Abstract

The rapid growth of Internet-of-Things (IoT) applications necessitates the development of cost-effective solutions and accelerated design cycles. While digital circuit design has witnessed significant automation, analog design still heavily relies on experienced engineers. To bridge this gap, synthesizable solutions that integrate digital and analog design automation are crucial for efficient IoT development. This paper explores the historical context and current challenges in circuit automation and electronic design automation (EDA) tools, specifically focusing on analog and mixed-signal circuits. As successive approximation register (SAR) ADCs play a critical role in IoT applications, it is important to critically examines the state-of-the-art synthesizable SAR ADCs, discussing the strengths and limitations of different design techniques for various circuit blocks. These findings provide valuable insights for researchers and industry practitioners, informing future research directions in the field of synthesizable SAR ADC design automation.

Cite this article

FENG YANG , DUY-HIEU BUI , YANG ZHAO , LIANG QI , JINGHUA ZHANG , XUAN-TU TRAN , YONGFU LI . Understanding Synthesizable Design Methodologies for Mixed-Signal SAR ADC Circuits[J]. Integrated Circuits and Systems, 2024 , 1(3) : 120 -126 . DOI: 10.23919/ICS.2024.3482310

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