Integrated Circuits and Systems >
A Resource-Efficient Weight Quantization and Mapping Method for Crossbar Arrays in ReRAM-Based Computing-in-Memory Systems
Received date: 2025-03-30
Revised date: 2025-06-11
Accepted date: 2025-07-02
Online published: 2025-12-24
Supported by
National Key Research and Development Program of China under(2021YFA0717700)
Nanjing University-China Mobile Communications Group Company, Ltd. Joint Institute
Resistance Random Access Memory (ReRAM) crossbar arrays have been used in compute in-memory (CIM) application owing to its high bit-density, non-volatility, and capability to perform multiplyaccumulate (MAC) calculations efficiently. The expansion of the size of the crossbars has led to the emerging challenge of high IR voltage drop and more complex logic control devices. In this paper, we propose a progressive weight pruning strategy based on gradient sensitivity analysis to reduce redundant parameters and enhance overall sparsity. Building upon this sparsity-enhanced structure, we further introduce two complementary weight quantization-mapping methods tailored for high-bit and low-bit quantization scenarios. The proposed method utilizes group quantization for clustering to merge weights in higher bits and leverages differential properties to conduct spectral clustering for merging weights in lower bits. Experimental results indicate notable savings in crossbar resources with minimal loss of precision. Moreover, we designed a carrier board-FPGA testing platform and deployed a neural network on a 32×32 size ReRAM crossbar. The results show that the proposed algorithm saves 42% of units, and the recognition accuracy of the MNIST dataset is within an acceptable range (91.5% to 88.3%).
Key words: ReRAMs; compute in-memory; weight mapping; quantization; spectral clustering; network pruning
MINGYUAN MA , WEI JIANG , JUNTAO LIU , LI DU , ZHONGYUAN MA , YUAN DU . A Resource-Efficient Weight Quantization and Mapping Method for Crossbar Arrays in ReRAM-Based Computing-in-Memory Systems[J]. Integrated Circuits and Systems, 2025 , 2(4) : 233 -242 . DOI: 10.23919/ICS.2025.3597876
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